MICRO OUTLOOK 2000

Shifting to the next phase

By popular demand, the next millennium is upon us. Like you, we wonder what challenges it will bring. Is that the sound of paradigms shifting? Or is it just the grinding of tectonic plates? For our informal survey, MICROutlook 2000, a few colleagues agreed to share their thoughts on what lies beyond the new horizon for the semiconductor industry and the wider world of microelectronics. Not surprisingly, copper and its attendant yield fallout are on the minds of several experts we spoke with. In situ monitors, new materials, 300-mm wafers, ESH concerns, metrology, earthquakes, and organic ICs also crossed their radar screens. Some 29 subjects surfaced, which we've numbered for easy reference. "The transistor is right up there as the single most important invention of our century," asserts Paul Saffo, a director of the Institute for the Future in Menlo Park, CA. Rhapsodizing further, the futurist calls the integrated circuit "the enabler of the technology of our times." The unstated truth is this: Without the enabling efforts of MICRO's readers this enabling device would not have brought the world its current high-tech wonders and the bright surprises sure to come. Read on, then, for a peek over the ridge by colleagues who work, if you'll pardon the pun, down in the trenches. —John Conroy

1. Defect Reduction

Fred Lakhani

Program Mentor, Yield Management Tools, Front-End Process Division, Sematech

We need to get in the trenches

In terms of the key trends for 2000 and beyond, let me first refer to the key focus areas that we are paying attention to and have been for at least a couple of years. The first one is the yield modeling and defect budget focus area. The second one is defect detection. The third focus area is defect sources and mechanisms, and the fourth one is defect prevention and elimination.

Within the Sematech member company community, one of the key needs is the ability to look down holes and trenches, which is one of the key challenges facing defect detection that we are addressing with suppliers. That is only going to get more difficult simply because as you shrink down the feature sizes the inspection tools that we are using right now, especially in the optical arena, must keep pace. It is difficult to resolve the features, much less classify them. It's a tall order to do that. Then given the copper technology on the horizon, or in some cases actually out the door, like at IBM and Motorola, copper planarization and dual damascene processing is going to become the mainstream in the foreseeable future. Therefore, it is going to become increasingly important to understand any defect formation inside trenches, and high-aspect-ratio inspection, called HARI, is the area of concern here.

2. Moore's Law

Steven Hillenius

Head, ULSI Technology Research Dept., Lucent Technologies, Bell Labs

We're pushing physical limits

We're pushing up against fundamental physical limits now in scaling these devices, so my primary concern is whether over the next 10 to 20 years we're still going to be able to improve the performance and cost and functionality of these devices at the same rate that we have.

As for Moore's Law, what I always tell people is that clearly we can't make a device smaller than an atom, okay? So, somewhere before that point, we're going to stop the scaling. Moore's Law is spoken about pretty loosely in all different ways, but the whole idea of improving the functionality of the devices is going to continue for at least the next 10 years. Beyond that, I think architecture and systems solutions to keeping the functionality going will be more important than the physical scaling of the transistors.

3. Cost of Ownership

Daren Dance

Vice President of Technology, Wright Williams & Kelly

Fab costs stimulate simulation

The cost of fabs is going up, and it's being driven up in a number of directions. One reason is the increased complexity of the fabs, and another is the increasing cost of the equipment that is used in fabs. The benefit is increased productivity. The issue that we're seeing is the risks of making an error are becoming very very large.

A couple of factors are driving that. First of all, if you wind up with a mismatched equipment set, then your productivity is not going to be as high as you need, and so your cost per finished wafer goes way up, and that may cost you your return on the investment. The compression of the technology cycles is such that you don't get much of an opportunity for a second chance on those kinds of mistakes. So what we're seeing in the area of simulation is not only are we needing to simulate the devices and the process architectures, but we also need to simulate the manufacturing flow that the process is going to need in order to reduce that risk of error.

Let's relate that to contamination. Because one of the biggest issues is quick time-to-yield, and if we have to spend three to six months in debugging yield problems related to either process-induced defects or particle-induced defects or parametric-related defects, then that's the same impact financially as a mistake in product or process or equipment layout or something else that is going to inhibit your productivity.

Reliability raises COO issues

There are more variables that need to be considered now than just the initial throughput of the tool and the initial cost of the tool. One of the things that we're finding from cost simulations is that reliability issues can cost you maybe a 10 to 20% increase in cost of ownership. What has happened is if a tool that's not normally a bottleneck or a capacity limiter goes down—say that you've got to do excessive chamber cleans or something like that—then you can starve something else, which is your design bottleneck, such as lithography. Then you've actually lowered the productivity of the whole fab. A very costly error.

Didn't happen #1 Steven Hillenius Oxides trend shown the gate The '94 SIA roadmap predicted that around 2004 you couldn't make an SiO2 film and use it as a MOS gate oxide any thinner than about 35 Å. In fact, in '99 microprocessors are being shipped at less than 25 Å. Those predictions were based on the fact that once you had direct tunneling current, you could no longer make a MOSFET device. It turns out that is simply not true.

4. Copper

Fred Lakhani

Tool sets needed for copper yields

IBM reported in September it has been able to get quite good yields on products using copper technology, but then IBM has been doing copper research in this particular area for at least a decade, if not longer. I've heard some rumors to the effect that other companies that are attempting to migrate to the copper technology are not nearly as successful from a yield perspective. So I think yielding on copper products is going to be quite challenging, at least in the foreseeable future, simply because the equipment set is not there. I think the industry is moving toward electroplating-type deposition as a mainstream process, but that really needs to be worked on significantly before it becomes a standard process.

Copper has many unknowns

There are still a lot of unknowns with copper, so I don't think people are just going to go wholesale into copper technology. I think they are going to be very careful to manage their migration to copper. I mean, I've seen in the press that Intel, for instance, is looking at going to copper at the 130-nm technology node and 300-mm wafer size in the 2001 time frame.

Most leading-edge companies have a three-step process, where you develop it and then you hand it off to some sort of a pilot fab and then you hand it off to manufacturing. This process could take three to five years after 2002, 2001, right? So it could be 2004 or 2006 before there are mainstream microprocessors on the marketplace with the leading-edge technology. There is a lot of debugging yet to be done.

Aaron Zude

Director of EHS and Security, Cirrus Logic; President, Semiconductor Safety Association

Copper plating — a waste problem

Copper plating presents a number of issues from an environmental, health, and safety standpoint. One is the generation and handling of the hazardous waste that's created from the copper process. The other is the use of resources; for example, water usage in the creation of the slurry is an issue. On the positive side, there is a lot of work being done in looking to evaluate the copper plating bath itself so that we are working to minimize the use of chemicals. We're looking to develop techniques for copper bath recycling. People are looking at minimizing the quantity of the rinsewater generated. Ultimately, we hope to develop a zero-waste copper-deposition process. That's long term. That's probably 2005 and beyond.

Dennis Yost

Managing Director, Process Integration Group, Applied Materials

Mosel gets EPIC copper yield

We've successfully demonstrated the business capability of the Equipment and Process Integration Center. Mosel Vitelic is a company in Taiwan that manufactures a number of devices, one of which is memory technologies. They came to us with wafers ready for interconnect. We ran the entire interconnect here at Applied Materials in our EPIC facility and characterized it; they tested it, and we got yield comparable with aluminum for them.

Mosel Vitelic hadn't run a single wafer on copper. We got their wafers, ran them through our baseline process flow, and proved their yield and parametric capability so that the company could quickly evaluate the technology in a much more rapid fashion, without the heavy investment of capital and development time. We were able to demonstrate that in less than 10 weeks from start to finish.

We used eight 200-mm wafers throughout the line to cross-section and test and do some characterization to show the wafer as you build up through the interconnect level. This was actually two levels of copper plus the level of aluminum to do bonding. So, in fact, it was a three-level metal process. There are some technologies around copper that require you to put some material on top of it in order to do the standard wire bonding. We were able to do that quickly, give the full characterization of the device and the technology, and give them a kind of test-drive, as we call it. The devices were 64-Mb synchronous DRAMs.

As for types of defects, very typically with dual damascene you might see scratches. Our tools see those scratches, but we've done quite a bit of work to eliminate and reduce the scratches. We've worked with a number of slurry suppliers to reduce the scratches. In our postetch cleanup one of the defects that we saw is specific to this DRAM because at 0.25-µm technology the geometries are so small that the energy on that structure was greater than it could withstand. Subsequently, before running the real lot, we fixed that problem. So we had what you could call a few "look-ahead wafers" at the front of this lot to make sure we saw the issues that would be specific to this device.

We see what we did with Mosel Vitelic as a huge paradigm shift. We think it's going to take off over the next year, where customers can come, evaluate the technology in a very complete fashion, really reducing their risk of introduction and their costs for evaluation, and improving their time to market.

Source: Dataquest and Robertson Stephens

Anthony Bonora

Director of Technology, Asyst Technologies

Copper stimulates green concerns

We see growing interest in the environmental concerns that go beyond particulate control. Molecular-level contamination is a concern. I think copper has helped stimulate that. Companies like Intel say they want to have a protocol for absolute discipline and separation of copper-based process tools. In fact, a number of companies, including ours, have played an active role in these evolutions of the current SMIF 300-mm standards that allow you to lock out one species of pod from others on any given process. It's something that's been driven not only by the suppliers like ourselves and Infab but also by the end-users like the Intels and the TIs.

Fabio Gualandris

President and CEO, Semitool

90% of chipmaking will use copper soon

By 2002, we will have the majority of production in copper. But I will go a little bit farther than that. By maybe 2002—maybe earlier, maybe 2003—I will assume that at least 90% of worldwide chip manufacturing will use copper rather than aluminum. The reason for that is not just because of technology costs. So there is no question that copper is going to replace aluminum. That is a done deal. The question now is, how long does it take until implementation?

Implementation has two major steps. One is the technological, and the other is economical. Technologically, I think that at least all the major semiconductor makers have made up their minds today. They know how to deal with copper, they feel a little bit more confident than a year ago, and there are some others already making real chips. The second step for those guys is to figure out how to take advantage at the design level of using copper in their chips. From a technological viewpoint, I am not concerned at all—copper is coming. From the economical viewpoint, the major barrier is that there are many vacuum CVD systems already installed, and people are not really anxious to throw away a very expensive piece of equipment.

Didn't happen #2 Daren Dance Whipping the 'cyclicality beast' Through the early part of the 1990s we really felt as an industry that we had gotten the cyclicality beast whipped. And we haven't, as 1998 painfully showed us. We tend to introduce capacity in very large chunks. And that doesn't allow you any way of, shall we say, fine-tuning the volume on your radio. Frank Robertson Cyclicality gone? That's a laugh The end of cyclicality? [Laughs.] That's a good one. I was at the SIA's 1995 awards dinner where they said the cycle's over, and I think we crashed within two weeks.

5. Yield Management

Ron Remke

Program Manager, Yield Management Tools, Sematech

Let's integrate yield data

This whole area of integrated yield management is going to really pick up pace. It's a mammoth project to get all this data from in-line processing, in-line testing, e-testing, and getting it all together in a database that somebody can use, and once they see the defects, correlating that back to where it happened. That's turning out to be a monumental job with a tremendous number of databases to merge. That's another area that we're pursuing, because member companies have recognized that that's a real problem.

The problem is that there are not as many standards as we would like on interfacing the data. The sheer amount of data is mind-boggling.

When we have a defect problem, we can't wait and solve it in the next few weeks or months. We need to solve it as quickly as possible. Integrated yield management is the thing we really need to pull all the data together.

Dave Hemker

Managing Director, New Product Development, Lam Research

Customers need yield engagement

For etch there's definitely a trend toward the actual yield on the wafer. Part of the reason is that's where our customers make their money. Another part of the reason is that if you have to run a lot of monitor wafers that aren't real production wafers, that costs money. We have to get more deeply engaged with our customers from a yield-management perspective. It's not so much that you just run a particle check and if it looks okay, start running. We have to worry about what their product-wafer yields look like.

Ida Lee

Research Assistant Professor, University of Tennessee

Organic IC—new yield problems

There will be completely different types of yield problems with organic ICs. Because we got this protein from nature the yield is very good, but when we are talking about a cell assembly system, just like all life forms, you have mutation and defects. So if we want to make a logic using all of it, that logic devices will be totally different from the current one. There are people working in this field right now. It is called defect tolerance logic.

The first goal we have right now for both DARPA and DOE is that if we can make just a simple logic device. . . and probably then we would go and approach the semiconductor industry in three to five years. Right now we are not making really advanced devices, but we'll try to make a single device connected by nanowire, showing that it's working, before we try to assemble a complicated, advanced device. The size of PS1 is 10 nm, so that's one diode. Usually, if you want to make an N gate you only need two of those diodes, and some resistor around it. I would say, probably 20 to 30 nm would make a simple logic gate.

As for defects, maybe some cells don't assemble properly. If your DNA's not assembled properly you have a defect. It's similar for our process. As far as fixing it one by one, that would be really expensive, so I imagine there will be some kind of gene treatment that you use to fix the problem.

Probably the chemical process will be the same as in traditional semiconductor manufacturing. We need a substrate too. The easiest way is still probably using a silicon substrate, but we'd use a different chemical treatment to let the molecular circuit assemble itself directly on top of the substrate.

6. Metallization

Daren Dance

Can back-end produce?

Some of my biggest concerns right now are at the back end of processing, where we start looking at the multilayers of metallization, whether that be copper or aluminum. Suddenly we're moving from an area where we only had a few layers of interconnect to six to eight layers of interconnect. And this is changing the whole architecture required in the fab, in the size of the equipment farms, and things like that. I think litho has been a focus area for a lot of people, but I think it's pretty well under control for a while. My concerns are more, can we get the productivity we need to produce the back-end interconnect, and then further out, my concern is with the gate stack. That is going to be even more sensitive to contamination than anything we've ever seen. How far off am I talking? Five years, eight years.

Source: Dataquest and Robertson Stephens

7. ESH

Bob Duffin

Director of ESH Division, Sematech

Big rise noted in ESH sharing

There are some general trends in environmental, safety, and health (ESH), and there are also some specific issues that must be addressed. One of the general trends is the dramatic increase in communication among universities, equipment suppliers, and semiconductor manufacturers. What this is doing is identifying earlier on for the researchers those issues that are going to have to be addressed, and it also provides a smooth transfer path into the equipment suppliers, where the processes really are designed initially and the equipment capabilities are determined.

Another highlight is that we have been very successful in our technical undertakings in coming up with several solutions to dramatically reduce PFC emissions. There are a number of technologies that have been studied. Some of them were proven to be technically viable but financially just too expensive, and we came up with other equally viable technical alternatives that had a much better cost of ownership or lower capital cost associated with them.

These things have now been mostly transferred, if they weren't already, into the supplier community and are becoming commercially available. That is going to be very supportive of the World Semiconductor Council's 10% emissions reduction goal.

ESH awaits defect benefits

There are some possible areas where ESH intersects with defects and yields, but they have yet to be proved. The first one is that as we recycle more water in the fabrication area we greatly reduce the amount of water that we have to bring in or discharge from our factories. There is conclusive data that by recycling water back into the feed system in the deionized-water plant, the quality is actually better. There are fewer organics and fewer particulates, so what effect that may have on defect yield is yet to be seen. Some of the early data I saw from one of our member companies didn't indicate that the average was any better on the electrical parameters that the device was measuring, but the distributions were much tighter. That bodes well for yield improvement if these are indeed sensitive parameters.

Another area is that we are moving very aggressively to replace sulfuric acid with ozonated DI water. In the past, simply in order not to have to use so much acid or to reduce the cost of operating an organic stripping process, manufacturers tended to use sulfuric baths longer so that particle counts and contaminants tended to go up. But if you have an ozonated DI water process that can remove those organics just as effectively, it certainly reduces the potential for contaminant buildup. Equally important, there appears to be a throughput improvement, because you don't have to rinse as long to remove the acid from the wafers.

Workers, ozone don't mix

One of the issues you have to watch for in the workplace is that ozone certainly is one of those harmful gases that you have to keep isolated from your workers, so there's a lot of safety considerations around putting a process like that into a piece of equipment. The second issue is you want the process to be equally available for spray and immersion tools, and all of the early work has been done on spray tools simply because the type of process that is being developed was easier to develop on those tools. There are equipment suppliers who are telling us that they have similar technology for immersion baths. I expect that somewhere in the 2001­2002 time frame we're going to see commercial tools that meet manufacturing requirements.

Aaron Zude

Green trends track processes

From my perspective and from what I've seen through the SSA and the issues that are being discussed in our forums, the ESH issues in the future will sort of follow the trends of the process issues, if you will. In other words, the change from aluminum to copper, the change from silicon dioxide to low-k dielectrics, the change to 300-mm and larger wafers, the increased use of planarization, advanced metallization, high-k, and plasma processes are going to drive environmental safety issues.

Process, environment intersect

It's always been my contention that in many respects what's good for the environment is good for the processes. If you look at things that we're trying to do environmentally in terms of conserving energy from a global warming perspective, if you can conserve energy in a process or in a factory for the purpose of reducing global warming, then you are also impacting the bottom line. If you are looking at reducing chemical usage through process optimization or the use of new chemistries or of alternative cleans, such as dry cleans or low-dilution cleans, you're saving chemicals, you're reducing waste, which is good for the environment, and you're also saving money for the fab. So for me, many of the things that we are doing to approach environmental safety issues are also good for the bottom line of the fab, and in fact, to a certain degree, are going to help to keep the industry on that historical productivity curve.

8. Metrology

John Hanselman

Director, Semiconductor-USA and General Manager, Philips Analytical

On-product metrology is in

Metrology has to respond to two big things—pthe evolution of wafer size and new material introductions. Because of 300-mm and even larger wafers, using traditional tools that look at test wafers and using monitor wafers is an unacceptable business model to present to customers. It's just too damned expensive.

Virtually every customer is demanding on-product metrology. Historical methods for contact or large-spot metrology are going to go by the wayside. They're going to be like buggy whips.

George Collins

Director of Marketing, Rudolph Technologies

Do or dielectrics

Gate dielectrics are a good example of the demands put on metrology equipment suppliers. Even two years ago people were still working with 60 or 70 or maybe 50 extra gates. Those could really be pretty effectively controlled by existing ellipsometers at the time, and the electrical performance of the gate could be pretty well predicted and characterized by just looking at the optical thin-film performance.

Today you need tool-to-tool matching around the world and long-term repeatability of better than half an angstrom, and the reality is that with some effort you could do that. Now people are getting to some 30-Å gates, and they're saying you need to do twice as good as that. You face the added complications that electrical performance and optical characterization of film thicknesses are not as good predictors as they used to be, because as you get thinner and thinner, you approach limits where tunneling and other electrical phenomena—just leakage current across the gate due to defects or impurities or whatever—become a noticeable part of the overall electrical performance. So you would be looking at things such as doing studies to correlate your optical measurements with electrical measurements or possibly integrating electrical measurements into an optical tool. And we've seen evidence of this in the marketplace.

If you looked over the history of transparent film metrology tools from the early 1990s to the late 1990s, the trend that you'd see in the early 1990s is that almost everybody was making all of their measurements—after they graduated away from just looking at the color of the film on the wafer—with optical reflectometers. By the mid-1990s people were snapping ellipsometers on the side of their reflectometers and selling combination tools. ThermaWave now talks about having five techniques in one tool, so people were going in the direction of trying to build the supertool. But the price that you have to charge for such a super-tool means that an optical thin-film measurement tool that was $200,000 to $250,000 in 1994 is maybe now $750,000, and that is hitting the limit of what people are willing to pay.

9. Process Monitoring

Terry Turner

Vice President of Instrumentation, Advanced Energy Industries

In situ is in place

The defect-related trend that I'm closest to, and the one that I see causing—pardon a worn-out expression here—a real true paradigm shift in the way we're running manufacturing environments, is the integration of in situ monitor capability on the process tools coming from the OEMs. We're finally getting to a stage where, instead of some people with advanced process performance requirements actually doing the integration effort themselves in their manufacturing environment, we're starting to see the OEMs put it on a tool in the design phase.

There are actually a couple of major plasma tool suppliers—etch tool suppliers in particular—that are offering a new generation of tools, the ones that they are recommending to their customers as scalable from 200 mm to 300 mm and will go on well into the next decade. Actually, they already have some instrumentation integrated into them for advanced process control. That's a true change in the way we have been building integrated circuits for the past 20 years.

It's really like most things in life. It's a cost-driven exercise. The amount of time that you stop production is lost revenue. The goal in most manufacturing environments today is to keep the tool busy processing wafers as much as possible. There is enough unscheduled down time because of various backlogs upstream of a given process or preventive maintenance events that the last thing they want to do is have to stop a perfectly good running tool to determine that it's running perfectly good.

There have also been some major technological advances in the instrumentation required for that effort. The biggest things are the communications capabilities, the analysis capabilities, and the output capabilities. The communications capabilities are probably still the weakest link because the standards are just now being given to us by SEMI. But there's been a couple floating around for a few years now. . . and people have been trying to design products that will work on any of those. And that's definitely the right approach because different OEMs and different end-users have those different communication protocols already up and running in a lot of cases. The miniaturization of the sensors, making them small enough so that we can get them on the tool without major perturbations, major redesigns, for example, in a pump stack, has also been a big boon to real-time instrumentation and monitoring. But the most important factor was the actual maturing process that instrumentation has undergone, and this has taken several years to actually happen—in understanding what the output from those sensors means in terms of a product wafer.

Sensors can output voltages, they can output currents, they can output all kinds of things—particle counts, RF voltages, and mass spectra outputs, but until you actually make the correlation back to the wafer, you force end-users to speak your language. And that's something they just do not have time for. The current mode of operation for most manufacturing environments is lean and mean, which means your equipment engineers and your process engineers are constantly stressed to get their wafer count through, and they don't have the time, or are not willing to take the time—and I don't really fault them for this, having been in that position—to go learn a new language. What they need to know is: tell me how this is going to affect my end result, and tell me in my language.

The trend that was late

After 10 years of pushing a rope here, I am finally able to see the adoption of in situ monitors. The move to 300-mm wafers really is pushing that change through. We can't afford to lose those things. They are clearly going to be much more expensive than 200 mm, so we need to know on a wafer-by-wafer basis if the process is going to give us the results we want.

Peter Younger

President and CEO, MKS Instruments

Tool sets lack harmony

As wafers get bigger and you get more value per wafer, that is going to continue to fuel the growth of automatic process control and the need for more process instrumentation with real-time control capability. In other words, you have got a lot of value on that wafer, you have got to take really good care of it, you've got more critical processes on there, you need to know right now in real time what's going on with that wafer and not find out about it two days later after you have trashed thousands of dollars worth of wafers.

Equipment and subsystem suppliers are more and more going to provide the process technology. That's already a trend that's well in place with some longer-term consequences. Because as the equipment people get into the process side, then they will be able to integrate process capability across multiple tool sets. That doesn't mean that they are going to put more processes on one tool, but what we have right now is a significant lack of harmonization in the tool set in the factory. You've got one tool producing 40 wafers an hour, another tool producing 60 wafers an hour, and another tool producing 30 wafers an hour. They are not matched in throughput. There are very few companies with multiple process tool capabilities, that can do a process sequence, be able to trade off process parameters from one tool to the next to throughput, to harmonize the throughput and get a higher overall equipment effectiveness.

Tom Long

Vice President of Module Solutions, and Corporate Marketing, KLA-Tencor

Integrated sensor trend picks up

There is a trend toward more integrated sensors that has been talked about for many years. It's beginning to pick up a little bit more steam now, and I believe that there are some applications, some measurements that do lend themselves to integrated measurements. There are a lot of other ones, though, and the state-of-the-art and complexity of systems to make a measurement of the type required going into 0.13 µm and below makes it economically unfeasible to put those kinds of sensors on every production tool. So we see that there will be a mix and match there, and one of the things that is very valuable—and we have a whole program going on in integrated sensors, working with a number of process tool companies—is the close tie between those results and the results that come off of more-sophisticated measurement systems. That becomes very important, so the sensor by itself may be able to give a go/no-go signal, but is not capable of providing the type of data necessary to solve the problem. There's a natural tie between integrated sensors—particularly from the data perspective, because what you do with the data is absolutely essential. Anybody can make a sensor, but the relationship of that data to the source of the problem and further analysis is absolutely critical.

John Hanselman

In situ is in distant future

Integrating the metrology into the process tool is very difficult, and to date that's only happening in the really most troublesome measurement technologies like CMP or in the simplest manifestation like a residual gas analyzer on a deposition tool where you're getting some indication of something. Real serious integrated measurement or even in situ measurement is still a ways away for a number of different reasons. It's very hard to make happen from an economic standpoint because the customers aren't pulling hard enough on the tool, and the process tool manufacturers don't want to take the added cost or the maintenance and support risk.

The whole back end of the chip now is different in terms of the process steps. Dual damascene is very cheap but very problematic from a control standpoint. You never even saw a CMP tool in the fab years ago. Now it's 30% of your expenditures. When does integrated metrology become commonplace throughout all of the process techniques? I think you've got at least another five years. If you go to the universities, to start-up companies, and to research labs, more and more people are really focusing on microspot integrated measurement systems. There's some very cool stuff coming out of places like Stanford and MIT.

10. Etch

Dave Hemker

Exclusion trend came slowly

Back in the late '80s or early '90s, I remember seeing a roadmap showing every device generation that they're planning. As is typical with these roadmaps, everything got harder. One of the predictions concerned wafer edge exclusion, where they were at 6-mm edge exclusion, and then they just kind of drew a straight line and they were out at 1 to 0 mm. That would have been in the mid-'90s. There's been significant progress made on that and people are at 3 mm going to 2 mm. It's just that I don't think the transition was as dramatic or as easy as everyone thought.

One obvious reason for the slow transition is that every tool has to be that uniform. If any one tool isn't there, the whole fab doesn't work at that level. Typically with plasma etchers, for example, any time you go to the edge of the wafer, that's a big discontinuity on the edge. It's just a fact. You're going from this piece of silicon with photoresist to something else. Even if you try to put a piece of silicon out at the edge, it just doesn't work. Going from 6 mm to 3 mm or 2 mm, where we're at today, has been a significant achievement. It's just that it wasn't a straight line to zero. There are some places where they're printing out closer to the edge, and they probably yield some die out at 2 mm that way.

Uniformity at edge is elusive

With edge exclusion, uniformity's the issue. Because of the discontinuity of the edge being there, it's always difficult to get perfect uniformity. It will be interesting to see where 300 mm starts up. Part of the reason people could delay going to 300 mm is if you could actually use every millimeter on an 8-in. wafer, that's worth a lot of real estate out at the edge.

11. 300-mm Wafers

Frank Robertson

Chief Operating Officer, Sematech

Poised for 300-mm intro

The recent announcements from a couple of people leading the charge into 300 mm have a level of credibility that survey projections didn't have back during the downturn. Clearly, the industry is in an upturn right now. People believe that it's real and, in fact, they wonder how they are going to meet their capacity needs so as to be able to gain and not lose market share. We know that the equipment has moved well into the piloting phase. We have a couple of facilities either operating or in the process of being put together to the point where very advanced devices have been fabricated with good yield. Although much of the automation is not yet mature, we have a pretty good feeling that the unit process equipment is moving very quickly in the right direction. The projections now on the timing for the first manufacturing facilities are centering on 2001, with the ramp-up to begin in earnest in 2002—2003.

Silicon houses ready for 300 mm

At this point the silicon suppliers have been the most responsive segment of the supplier community in terms of getting ready for 300 mm. They have what the industry needs and they are making progress very quickly on quality and more advanced technology.

Terry Turner

The new wafers are here!

When we made the change from 150- to 200-mm wafers, IBM bellied up to the bar and said: "We want it done our way so we're going to pay for everything up front. And the rest of the industry is going to be forced to do it our way, but they're going to benefit by not having to make this huge expense." IBM learned its lesson. They, along with the rest of the industry decided: well, we're never going to do that again. So, what we're seeing now, due to the recession of last year and 300-mm tool releases being pushed out, are blocks of major customers making a purchase all at the same time.

Now, that's very good for everybody. All of a sudden the 300-mm tool suppliers aren't getting "one-sy, two-sy" orders, which make paying for the type of developmental expense required to go to 300 mm a real challenge. All of a sudden they're getting substantial orders coming in from multiple customers for the same product, so they can afford to really do it right and provide all of those customers with a truly superior-capability product, and hopefully one that is going to be more mature than what we have seen in the past in the wafer scale transitions from 100 to 150 to 200 mm, where we had a lot of what I'll call "prerelease tools" sent out early.

12. CMP

Steven Hillenius

Copper raises defect stakes

The one thing that's going to affect defect reduction now is the implementation of copper damascene and CMP. Defects are a concern at every level, but in our development of the processes defects are most important at the metallization level, and we're changing the way that we do metallization completely, going away from aluminum and SiO^₂ toward copper and low-k dielectrics. This industry is very slow to implement new materials, and these are two dramatic changes that hit us right where defects are most important.

Clearly, the whole change in metallization toward copper and low-k dielectrics is going to drive defect research. I'm not sure which way it's going to go, but I'm assuming that it'll get better. CMP, which is used for the damascene process, is sort of like an aggressive clean. As long as the CMP step is clean, you don't have propagating defects through the layers because you basically polish off any nonfatal imperfections that occur. They don't kill you at the next layer.

13. Materials

Conrad Sorenson

Director, Advanced Semiconductor Research Programs, Praxair

New materials redefine defects

I'm concerned about the integration of all the new materials. I think it's going to redefine defects once again, with unexpected interactions of materials. The different precursors are going to have various human health issues associated with them. So the effect of these new processes on the people in the factory and on the environment is going to be very important as well.

The accelerated shrinking of devices has got us bringing in new materials in the gate stack, which will cause us to make changes in materials such as potentially adding in lead zirconium titanate or BST as a high-k dielectric material. All of those things will have to be deposited, etched, and maintained, and we're not looking more than about five years out. Many of those things don't have well characterized supply systems and precursors, for example.

Fred Lakhani

Gate dielectrics need attention

I think the gate dielectric area is one area that people really haven't paid a lot of attention to in terms of defectivity. The primary reason is companies are saying, we're going to push the SiO₂ down to as thin as we can go before we go to the high-k dielectrics for the gate. And if they try to bring in new materials for the dielectric as well as the electrode and put the integrated process flow around it, they are going to find that there is a significant defectivity issue that is going to have to be resolved.

Aaron Zude

Will toxicology science lag?

I think probably the greatest impact on this industry in the future is the change in chemistries that is coming about because of the advanced metallization, the low-k and high-k dielectrics, and the interconnects. For all the new chemistry sets that are coming in here in the near future, the challenges for the environmental health side of the industry are to be able to get good assessment of the hazards of the chemicals, to be able to get up-front information on the reaction by-product, the effluent, and indeed the health and safety issues of the chemical itself. We can help design the appropriate control methodology, both for the worker and for the maintenance guys that are in there cleaning out the CVD chambers. My fear is that the science of toxicology is going to lag behind the manufacturing technology.

Bob Duffin

New chemicals bring new concerns

There is a new need, and this has to do with the very rapid introduction of new chemicals and gases into the R&D arena. This is being driven by a number of technology requirements associated with front-end processing, but also with back-end, or interconnect, processing. Low-k and high-k dielectrics and a number of new chemicals are being rapidly introduced to research and development, at a pace that we've never had to deal with before. Thus, we have to have better and faster ways of getting the data that are required to work with these chemicals, so that we don't slow down the development of the technology, but also so that we don't jeopardize workers.

Some of the precursor gases, for instance, for low-k dielectric deposition contain either silicon or metallics. A classic example is the organometallics. We need low-temperature processes to put down films that have different kinds of properties than what silicon dioxide or silicon nitride have given us in the past.

14. R&D

John Hanselman

Commercializing R&D is hard

Moving technologies in very rough form into the industry is really hard because it requires so much capital investment and personnel. For example, go to Intel or IBM or Motorola, and say, "I've got this great new technique for looking at one of your process steps. I'd like to do a test with you." They say, "Great, we'll take a tool, a fully functional tool with cassette loading, you can't touch our wafers manually. You guys invest a minimum of $500,000 or $750,000 in hardware, and then give it to us for a year with your engineers to run it, because we're certainly not going to put our engineers in and interrupt our process flow." Most little start-ups don't have the $5 million or $10 million that it takes to get the thing up and running.

Steven Hillenius

Basic R&D has increased

The industry has gone through several cycles in the last 10 years, and we have, too, at Bell Labs. The level of support for basic research in this area is greater now than it was several years ago. We went through a period with the industry that looked like the technology was becoming a commodity to some degree, and everyone had figured out where the limits were, and all that was left was filling in the gaps. In the last few years that's changed dramatically, and a lot of the things we took for granted as limits aren't limits at all.

Vertical ICs open new dimension

I saw more exciting inventions and discoveries come out of this laboratory in the last two or three years than in the years prior. One of those is a replacement gate vertical MOSFET. You can actually turn the transistor on its side and start to get into the third dimension, so you can basically stack these transistors edgewise. You don't need lithography to get the narrow gate lengths. Now it's film thickness, and that's a key advantage. It also allows the possibility of putting more than one transistor in that direction.

Tool plan keeps R&D costs low

The cost of production tools is getting greater and greater. We're at 8-in. wafers now, we'll be at 300 mm soon, and you can't do research on old equipment and have it be relevant to new technologies. It used to be that every new piece of equipment would cost you a half-million dollars, then it was a million, now it's several million. You can't populate a research laboratory with many of those tools before you go bankrupt.

What we have done quite successfully in key areas of expertise at Bell Labs is have research tools that are either custom made or modified, but they interface into production tools that are run as standard processes. We routinely swap wafers back and forth from our development lines and run key research steps or sequences of steps in a research lab or a research cleanroom and then continue the processing in the production line. This allows us to offset the costs.

15. Lithography

Frank Robertson

Lithography steps to forefront

Pretty clearly, for Sematech and for the industry, our main concern is the strategy we are going to take with respect to lithography. We have a number of options, both in optical and in postoptical, if you will, in next-generation lithography. We have a very good process going right now to achieve not only member company consensus but also industrywide consensus on what are the showstoppers or potential showstoppers, the key technical challenges, the critical issues as well as some of the crosscut-technology items.

16. Sematech

Frank Robertson

Sematech's role will change again

I think that Sematech will be around in 2010, and I think that it will be different than it is today. We're much different than we were 10 years ago. We're constantly adjusting our program strategy and our member-company deliverables, if you will, to meet the precompetitive needs.

I can give you some backward-looking examples of how things might change. My crystal ball is not much better than anybody else's, but obviously 10 years ago we were very much focused on the equipment improvement business, helping the suppliers improve the reliability, the process capability, the manufacturing cost, and the cost of ownership of equipment. A large part of our program portfolio was focused on high cost-share development and equipment improvement projects with suppliers to address those issues. These days we have a much more diverse portfolio of programs that includes tool improvement and development programs but also spans all the way from manufacturing methods to advanced technology developments like lithography.

I would expect that another of the changes that has occurred in the past will continue; that is, the focus had been largely on unit process. We are having to solve more complex system issues that involve module integration, things like gate stack and double-level metal structures, to look at copper and low-k materials. The problems are getting more complex and the programs have to be configured to deal with them. For example, we are working on the gate stack, so we have to integrate the precleans, the gate dielectric deposition/thermal formation, the electrode deposition, and the materials, the etching of the gate electrode, the formation of low-resistance contacts to those dopant regions. It used to be that our members didn't really want us to work there, but now they are pushing us to drive more integrated solutions—very generic integrated solutions—because they are going to have their differentiated processes.

17. Ergonomics

Aaron Zude

Ergonomics—a job well done

In terms of the fab environment and the worker-machine interface, the trend toward robotics, smart interfaces, wafer pods, and automatic wafer handling has definitely done a lot toward resolving some of the wafer-loading ergonomic issues. What that has done, however, is transferred a worker-machine interface from an ergonomics standpoint to a worker-machine interface from a robotics standpoint. Now we're seeing lots more robotics in automated handling and laser alignments and a new set of issues that are being brought in. That's not to say that there aren't a lot of fabs where they're still manually loading wafers into diffusion furnaces, and those issues are still there and will still be there as the fabs retool. But the ergonomics people have done a lot of good work with the manufacturers and the equipment suppliers.

Conrad Sorenson

A fab, a man, a dog

One trend is that the fab of the future will have a man and a dog.The purpose of the man is to not touch anything and the dog's purpose is to bite the man if he tries to touch anything, but I don't see any reason to believe that the trend will continue.

18. Partnering

John Hanselman

Start-ups can't find partners

The requirements for introducing automation and noncontaminating and noncontact measurements have gotten so stringent and the bar has been raised so high that it precludes start-ups from kind of jumping in. Therefore, you've got to partner up, and partnering up with one of the bigger existing companies is harder and harder. It can happen. We just did it here at Philips Analytical, but there are fewer and fewer opportunities for that, and it's a trend that Sematech is trying to address.

19. Mergers

Peter Younger

Here comes the consolidation

The issue won't be buying the best particular tool of one design, it's maximizing the factory throughput. That is going to favor larger, multi-product-line companies. There will still be a role for new equipment companies, startups, and material suppliers, because they are still going to continue to provide a lot of the innovation, new ideas, new process capabilities, but they will have two very significant barriers to face when growing their companies. First will be the market share leadership that the big companies have. The second is the cost of the global infrastructure. It costs a lot of money to have sales, service, and applications operations all around the world. Those costs are very high, and what that will do is drive further consolidation in the supply chain. So there will be start-up companies that bring innovation, but much of the time they will get acquired by larger companies.

Conrad Sorenson

Are mergers serving customers?

As consolidation occurs in the industry, there's concern among our customers that the industry doesn't "overconsolidate." Customers want choices between manufacturers. The consolidation trends are not necessarily being driven by the customers' best interests but by the shareholders' best interests. I see that as a limiter.

20. SIA Roadmap

Tom Long

Speed of roadmap tests yields

I think that the continued acceleration of the roadmap with people even getting more aggressive about moving from 0.25 to 0.18 to 0.13 µm is providing a lot of challenge in the yield area. And of course, what goes along with that is the lithography trend of moving from the 248-nm regime down to 193-nm with a lot of advanced optical proximity correction and phase-shift type techniques providing tremendous challenges in defectivity and critical dimension control in lithography. Then if you put on top of that the increasing density and the smaller geometries, the defect density trend is continuing to be driven down to electrical defect densities that closely approximate the design rule.

Those three challenges all come together, I think, along with new interconnect technology, copper, and low-k to provide quite a challenging environment for people to continue to drive their defect densities down and achieve yields that are cost-effective. We're also seeing some tremendously large chips—a number of chips we're seeing are as big as 2 cm on the side today. And so with a system-on-a-chip­level integration, where people are trying to pull embedded memory onboard along with the processing, these are very challenging to yield.

With the changing roadmap, where new technologies are moving now every year and a half or so to the next generation, the challenge is to rapidly develop the process and get the yields ramped up. You can no longer wait a couple of years and expect to ramp the yield over two years because within a year and a half they're moving to another generation. In order to gain the maximum return on investment, I need to transfer processes from development at very high yields because the lifetime of the process, or in the case of a lot of products, is so short that I don't have any opportunity to really make any money unless I come out of the chute at high yields.

Peter Younger

Forget fast intro of new tools

I think the industry drivers will be high-speed computing—graphical applications, e-commerce, and communications. Another critical issue is the International Technology Roadmap for Semiconductors and the question of the rate of new technology nodes. There's this movement to try to move from three years to two years. I think a slowdown's been decided. Technology issues will not slow it so much—they always look insurmountable, but they always have a way of getting solved—but I think there's a huge cost to the equipment and process development side. Those huge costs have an economic impact on the supply chain. For instance, if I introduce a tool to the marketplace and I can sell it for six years and now I can only sell it for four years, my payback is going to be less. So, if I can afford to spend 12% or 15% of our sales on engineering and development and I get a lower amount of sales out of those tools, I am not going to be able to develop those tools as rapidly as before.

I think one thing that will offset that trend will be the focus that is in place to extend the technology of existing tool sets. That will offset some of this retardation. For example, just going out and doing upgrades to the installed base extends the equipment's technological lifetime.

21. Business Drivers

Jim Usher

President and COO, Busch Semiconductor Vacuum Group

Consumers will call the shots

The semiconductor industry will be fueled by technology breakthroughs stemming from unprecedented consumer demand for advanced products. Equipment will need to keep up with changes in storage capacity and in devices as demand for advanced graphics and photo imaging applications increase. Readable and writeable CD and DVD technology will become easier to use, less expensive, and likely to replace today's floppy and Zip drive technology. Demand for these products will significantly drive etch and PVD equipment sales.

We'll see more video enhancements to the PC. And we'll have 17-in. or greater high-res FPDs replacing or supplementing CRT products. Within 5 to 10 years flat-panel TVs and HDTV will be affordable and widespread. To meet these and other consumer demands equipment design will be significantly different in the next 1, 3, and 5 years. Because of efficiencies, equipment power demands will decrease, necessitating changes in the power supply industry. Most FPD plants will need to retool to keep costs down and production up. And increasing worldwide focus on clean air issues will continue to drive abatement solutions.

Tom Long

Nintendo is a friend of copper

I think 2001 is kind of our consensus on volume production of copper chips. There are a number of people who are in volume manufacturing today, but I think for higher levels of adoption, we'll see 2001, and right now it's largely product driven. Meaning that where there is a major premium on product differentiation, on circuit speed—and there is a lot of interconnect involved—then a customer is quite driven in those areas. For instance, microprocessors are a big driver, and the electronic game industry is becoming a major driver as well. You know these second-generation Nintendo games are becoming more than just game-players. They're becoming basically a computer station that can play games and interface with the Internet and do a lot of things, and so speed is of a premium there for differentiation as well.

Mark FitzGerald

Vice President, Securities Research and Economics, Merrill Lynch

PC business drives the cycle

The most important call here is just getting the business cycle right. And to do that you actually have to spend more time focused on upstream issues like what's happened with the PC unit growth rate, what is going on in the DRAM business in terms of supply and demand, or what's Intel's business, because the PC chip business is by far the biggest consumer of semiconductor capital equipment.

It's funny, because at the beginning of this year when the PC business was a problem, all the cap equipment companies were saying, "we're a play on the Internet at this point." Now that the PCs are back in, they know it's the PC business that's driving their business. So, they want to eat their cake and have it too, but the bottom line is—and I've stuck with my guns here—that the PC business is clearly the main driver here. And within that it's the DRAM business. If you look out there in terms of wafer starts, the DRAM business accounts for about 50% of all wafer starts, which is huge on a volume basis. By far the biggest end-user of capital equipment is the DRAM market, and where do DRAMs go? PCs get 75 to 80% of them.

Communications trend is hot

Communications probably account for about 20% of the capital equipment buys out there. Cellular phones are the big application out there. Things like DSP parts, and then right behind that are consumer electronics. The two are kind of merging here. A lot of them are focused on cellular telephones hooking up to the 'Net, so it is going to be hard to distinguish communications from consumer electronics, I think.

Why we keep going in circles

I think it's hard to say that the semiconductor business is not going to be a cyclical business. It's a supply-demand issue and the industry never quite gets the supply matched up with demand, and the nice thing is we're in a shortage period now. But ultimately, as profitability builds back in, we'll go building more capacity, and the history of the business is, we'll overdo it.

Even after coming off the bottom here, for the last eight or nine months people have been incredibly concerned just because the risk has always been having too much capacity. And now it's flipped to the other side, where the risk is missing market opportunities because you don't have capacity. So the mentality now is to throw money at capacity, and ultimately that's the seed of our demise in this cycle.

Is the recovery overstated?

I'm very concerned today because of one area. I believe there is double ordering going on in the semiconductor business at this point, and inventories are getting built out, and when you talk to device manufacturers no one can quite tell you how much of what they're shipping today is double ordering or being put into inventory. We know it has to be happening because lead times have increased. Four or five months ago people could get two- to four-week lead times, but when you have 20- or 26-week lead times, which is the case for some parts that are in short supply at this point, you as a buyer have to go into a totally different mode. As you panic, you start looking wherever you can get the product, and the history of the business is these guys go out and place double orders.

So the strength that we're seeing in the semiconductor business right now is really overstated, and the question is, is it 10% overstated, which would be modest and I think we could easily get through, or is it 30% or 40%, which would be clearly a problem for the business.

22. Software

Fabio Gualandris

Software is 'major revolution'

In the next 5 to 10 years the semiconductor equipment business will become less dependent on hardware and more dependent on process and software. Hardware is going to become something that is taken for granted. People don't discuss it anymore. It will be like buying, maybe, a washing machine. Kind of a commodity, right? It's not an area in which we have a distinctive value. So, you can design in some distinctive value, of course, but nobody will give you credit or merit because your platform is reliable. Because if it is not reliable, you are not even called to the party.

Hardware is a given. And the same is true of service and quality. The area in which we are going to differentiate the companies? Software and processes. ''Process'' means process stability, process maintenance, and process integration at dynamic and static points. And software is a sophisticated layer that has to give your machine a filter or mirror in which people can model the process, see how to intervene, how to simulate the process, how to simulate process integration, how to simulate maintenance, how to train the people, how to exchange information between the vendor and supplier. The software is going to become an area of tough competition because the software is the way to go to improve the process. That's a major revolution.

Source: Dataquest and Robertson Stephens

23. SMIF

Anthony Bonora

SMIF is not isolated

Going into the last industry downturn, we were seeing SMIF acceptance rates at new fabs or major fab upgrades in the range of 25 to 35% globally. That means one out of every three fabs had gone SMIF or was about to. In the intervening 12 to 15 months, we have seen an acceleration of SMIF acceptance at 200 mm that appears to be close to doubling that acceptance rate. For the first time we see major fabs in Japan embracing the minienvironment and isolation concept, and at 200 mm.

Japan had been probably the slowest to adopt the concept initially, but manufacturers there are moving quickly to embrace this. I think that their fab discipline and their approaches to building Class 1 fabs served them pretty well down to the 0.25-µm-technology level. But as they have moved lower, they have started to find more contamination issues and material logistic issues where SMIF approaches were of value.

24. Cycle Time

Anthony Bonora

Cycle trend de-emphasized

I would say there has been less emphasis on cycle-time reduction in fabs and a lot more emphasis on the process and device shrink aspects in fabs. But I would expect in the next few years to see the economic advantages of cycle-time reduction becoming important. Previously, if you didn't have the ability to move down on the critical linewidth issues, you were at a huge economic and performance disadvantage versus your competitors. So that was a must-do. Whereas cycle time might give you a little better time to market, less tie-up of inventory, and so forth, it wasn't as compelling a requirement.

25. Organic ICs

Ida Lee

Ready for a spinach-based IC?

Part of our project is to make a device that can be mass produced. We are really down to molecular-size electronics, because electronics, as you know, are shrinking smaller and smaller, so eventually the perfect size is a molecule. So far, we have just tried to purify this already-made molecule, by nature, and act like a solar cell. In the dark we have found out it has the properties of a diode, so it can rectify current. The advantage of this one is all the chemical processing, so it is easy to mass produce, and after isolating the protein we use in chemical matter, like cell assembly matter, it is really easy to mass produce. We would just imitate nature because all the organisms that really function well are all cell assemblies. So, that would be the ultimate goal for the molecular-size circuit, using a cell assembly master.

As far as mass production, it will probably take seven to eight years. It is totally in the laboratory still. Primary developments that would get it out of the lab and into production would be the cell assembly. And the second one is connection; you need to connect these molecules with each other and also with the outside world. You have to have some molecular type of wires. That is one of the reasons why a lot of people are doing research on carbon nanowires. They have metallic properties, they are a really good conductor, so they would be a really good interconnect for molecular electronics.

SEMI's Top 10 Trends 1. 300-mm wafers 2. Economic model for product development 3. Materials transition 4. Chip scale packaging 5. Fab automation 6. Lithography: Redefining small 7. Outsourcing 8. Access to expansion capital 9. Capacity visibility 10. The Internet

26. Foundries

Frank Robertson

Foundry model will expand

Clearly, the cost of fabs is going up. Productivity for fabs is also going up. Those kinds of investments are mind-boggling, but they seem to be worth it. The trend over time has been for fabs to become more expensive. But because of productivity improvements, the cost per function is coming down even with that. The fact is that a 300-mm factory with a standard high-volume output and say, 0.13- or 0.10-µm design technology is going to put out just a staggering volume of chips, and there are only a few individual companies that need one of those factories very often.

Of course, high-volume chips like DRAMs and microprocessors are in that category, and the main trend that is also taking advantage of this is the consolidation of capacity that occurs when foundries pull a lot of business in from a lot of different customers. Therefore, if fab costs and the increments of capacity continue the way we see them going, I think it's going to drive a selected set of customers to continue building their own fabs for their business reasons, and it will drive a continued expansion of the foundry model as a way of consolidating others' business into large-enough demands for capacity.

27. MEMS

Daren Dance

Keep an eye on MEMS

The one area that I'm watching closely is what is going to be the impact of microelectromechanical systems. I think it's a wide-open new field. There's almost no way of predicting the market growth in some areas, but others are already industrially accepted and growing. For instance, the automotive stuff. I think we've got a not unique but a real interesting technology in its infancy, which can integrate well with the rest of the electronics industry.

28. Chip-Scale Packaging

Daren Dance

Chip-scale raises class issues

Another trend is the increase in wafer-level, or chip-scale, packaging. We're moving away from serial-type wire bulk processes and moving more toward match-type assembly processes. In that whole area I think people are not yet considering the impact of contamination as they move to finer and finer geometries. We're going to have to build them in Class 10,000 areas, and that is a big change from the assembly people's practices.

29. Earthquakes

Peter Younger

Earthquake shakes outsourcing

Outsourcing by semiconductor manufacturers will continue. But I believe the earthquake in Taiwan is going to make people rethink that a little bit. Not that they will go away from it, but I think that it will spur investment outside of Hsinchu—and it may provide some opportunities for other foundries in places like Singapore. There's too much dependency on one part of the world.

Daren Dance

Can you model an earthquake?

That's an interesting question and one I've thought a lot about. We have not built such a model. The difficulty is we're modeling chaos, and I mean mathematical chaos, not structural chaos. And we're modeling very abrupt transitions in streams of normally uniform or slowly varying trends. And that is of mathematical interest in modeling. I think it's do-able. I think we could do it with simulation, but the real question is not so much whether the model is mathematically capable, but can we foresee the turbulence well enough to describe the postevent environment? I'm not convinced we can do that yet.

I'm watching the situation very closely. We've got people on the ground in Taiwan. I've been surprised at a couple of things; for instance, at how quickly the equipment is reported to have come up. I think that's part of the benefits of equipment design learning that's occurred. Between the change from 6- to 8-in. wafers, we learned a lot about how to build more-reliable equipment, and I think we're seeing that benefit.

One thing that surprised me was the dependence on a steady supply of complex quartzware, and also masks. All of those are fragile. I haven't heard this, so this is pure speculation, but if I were running a fab over there right now, before I really turned on anything other than process evaluation production, I would want to requalify every mask blank. And that may require repair and repellicleization to eliminate any things that have been jarred loose. That's a big labor effort, and it's equipment intensive. It's those kinds of things that are sometimes hard to predict when we do a catastrophic event model.