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BUSINESS/TECHNICAL PROGRAMS

The following business and technical programs will be offered during the week of Semicon Southwest 99. All events take place at the Austin Convention Center. The general program courses are listed first, followed by the International Electronics Manufacturing Technology symposium schedule. For complete program information, log onto SEMI's Web site, www.semi.org.

General Program Schedule

SUNDAY, OCTOBER 17

8 a.m.—5 p.m.

How to Successfully Manage New Product Introductions
Instructors: David Jimenez and Walt Ferguson, Wright Williams & Kelly; Michael Wright, Entegris (continues
on Monday, October 18, same hours)

8:30 a.m.—5:30 p.m.

Winning Customer Satisfaction . . . without Stress
Instructor: Cole Baker, The CompoGroup (continues on Monday, October 18, same hours)

9 a.m.—5 p.m.

Lithography Science
Instructor: Harry Levinson, DUV Lithography Development
Project Leader, AMD

1—5 p.m.

STEP: SEMI E79, Standard for the Definition and Measurement of Equipment Productivity

Chair: Jim Irwin, Irwin Consulting

Welcome/Introduction
Jim Irwin, Irwin Consulting

Economics of Equipment Productivity from the Equipment Supplier View
Jim Irwin, Irwin Consulting

A User's View of Equipment Productivity Improvement as a Strategic Advantage to the Equipment Manufacturer
Jeff Ellison, AMD

In Pursuit of Efficiency (Integrating SEMI E10, SEMI E58, and SEMI E79 to Optimize Equipment Performance)
Tom Pomorski, Fairchild Semiconductor

Tool Availability, MTBF, MTBI and Parts Availability and How They Impact Productivity
Andrew Melnyk, KLA-Tencor

Fab Economics and Productivity Benchmarks
Rob Leachman, UC Berkeley

Wrap-Up/Q&A
Jim Irwin, Irwin Consulting

MONDAY, OCTOBER 18

9 a.m.—5 p.m.

A Partnership for PFC Emissions Reduction (cosponsored with SIA, SSA, International Sematech)
Chairs: Laurie Beu, Motorola; and Mike Mocella, DuPont

PFCs: The Year in Review
Sally Rand, U.S. EPA

World Semiconductor Council Update
Chuck Fraust, Lucent Technologies

An ASET New Program for PFC Emission Reduction in Dry-Etching Process
Yasuaki Hokari, Association of Super-Advanced Electronics Technologies

Remote Plasma Clean Technology for Applied Materials Dielectric CVD Chambers
Laura Mendicino, Motorola; Alan Atherton, Applied Materials; and Andrew Johnson, Air Products and Chemicals

Use of High-Power Retrofit Kit and C^₃F^₈ to Lower PFC Emissions during PECVD Chamber Cleaning
Susrut Kesari and C. H. Lee, 3M; and Tae-Hoon Kim and Ki-Sik Min, LG Semiconductor

Oxide Etch Tool Emissions Comparison for C^₅F^₈ and C^₄F^₈ Process Recipes
Dan Cowles, Air Liquide America

Characterization of Etch Exhaust By-products by FTIR and QMS for Alternative Chemistry and Plasma Abatement Applications
Victor Vartanian, Motorola; Simon Karecki, MIT; Bill Wofford, RF Environmental Systems; Eric Tonnis, UC Berkeley; Rusty Jewett, Litmas; and Michael Platt, Leybold Inficon

Impact of Increased Fluoride Emissions from Remote Cleans on Air and Wastewater Streams
Paul Thomas Brown, Laura Mendicino, and Victor Vartanian, Motorola

On-Site PFC Recovery—Off-Site PFC Reuse: An Update of Operating History
Gene Crossland, Edward Bell, Thomas Booth, Kimberly Christian, Matthew Foder, Robert Ridgeway, and James Yang, Air Products and Chemicals

Praxair's PFC Capture Technology
Richard Kelly and Cynthia Hoover, Praxair

Catalytic Abatement of PFC Emissions
Ashish Bhatnagar and Tony Kaushal, Applied Materials; and Roy Brown and Joseph Rossin, Guild Associates

Catalytic Decomposition of PFCs
Shin Tamata, Hitachi

Long-Term Evaluation of a Litmas "Blue" Inductively Coupled Plasma Device for Point-of-Use PFC and HFC Abatement Conducted at
Motorola
Victor Vartanian, Motorola; David Graves and Jarad Daniels, UC Berkeley; and Rusty Jewett, Litmas

(A poster session with wine and cheese reception will be held immediately following the program.)

TUESDAY, OCTOBER 19

8:30—9:30 a.m.

Equipment and Materials Market Briefing

9 a.m.—5 p.m.

Overall Equipment Effectiveness: Improving Equipment Productivity
Instructors: John Fowler, Arizona State University; and Jose Padillo, TEFEN

Software Management for Senior Executives Course
Instructor: Harvey Wohlwend, Program Manager for Software Improvement, Sematech

10—11 a.m.

"Copper Critical" Readiness Briefing (new SEMI program cosponsored by Philips Analytical)
Chair: Ken Monnig, Sematech

WEDNESDAY, OCTOBER 20

8 a.m.—5 p.m.

Practical Negotiation/Influencing Skills for Semiconductor Professionals
Instructors: Robert J. Laser, Senior Managing Partner, and Stanley N. Sloan, Managing Partner, Alliance Management Consultants

8:30 a.m.—5:30 p.m.

Chemical Vapor Deposition Technology
Instructor: Ted Kamins, Department Scientist, Hewlett-Packard Laboratories

9 a.m.—5 p.m.

Understanding and Using Cost of Ownership
Instructors: Wright Williams & Kelly

THURSDAY, OCTOBER 21

8 a.m.—5 p.m.

Semiconductor Processing Technology
Instructors: Peter Gwozdz, San Jose State University; and Richard Blanchard, Failure Analysis Associates (three-day course continues through Saturday, October 23, same hours)

Twenty-Fourth International Electronics Manufacturing Technology Symposium (IEMT)—"Advanced Packaging, Interconnect and Semiconductor Solutions for the New Millennium" (cosponsored by IEEE, CPMT, SEMI)

MONDAY, OCTOBER 18

8:30 a.m.—noon

Array Packaging I
Chairs: Deborah Patterson, Flip-Chip; and Linda Matthew, TechSearch International

Monolith Package—A Novel FBGA Using 3-D Transfer Laminate Circuit Process
Toshio Yamazaki, Kazuhisa Suzuki, Yoshiaki Wakashima, Naoya Suzuki, and Naoki Fukutomi, Hitachi Chemical

The Effect of Au Plating Thickness of BGA Substrates on Ball Shear Strength under Reliability Tests
S. C. Hung, P. J. Zheng, S. C. Lee, and J. J. Lee, Advanced Semiconductor Engineering

Shear Testing and Failure Mode Analysis for Evaluation of BGA Ball Attachment
Robert Erich, Amkor Technology; Richard J. Coyle and George M. Wenger, Lucent Technologies; and Anthony Primivera, Universal Instruments

The Influence of Nickel/Gold Surface Finish on the Assembly Quality and Long-Term Reliability of Thermally Enhanced BGA Packages
R. J. Coyle, A. Holliday, P. P. Solan, and T. I. Ejim, Lucent Technologies; and Paul Mescher, Amkor

Parametric Analysis of Solder Interconnection of Flip-Chip Packages
Jin-hyuk Lee, Dong-hyeon Jang, Tae-koo Lee, Nam-seug Kim, and Tae-gyeong Chung, Samsung Electronics

Flip-Chip on Flex for 3-D Packaging
Phillipe Clot and Donald Styblo, Valtronics

Computer-Based Modeling for Predicting the Reliability of Flip-Chip Components on Printed Circuit Boards
Chris Bailey, H. Lu, and D. Wheeler, University of Greenwich

Manufacturing Optimization
Chairs: Paul Conway, Loughborough University; and Erik Jung, FhG-IZM

Making the Six-Sigma Leap Using SPC Data
Robert L. Horst, Peak Productivity USA

Integrated User Interface Design for Electronics Remanufacturing Systems
Ismail Fidan, University of Northern Iowa; and Russell P. Kraft, Rensselaer Polytechnic Institute

Optimizing Electronic Manufacturing Processes
A. Doniavi, A. R. Mileham; and L. B. Newnes, University of Bath

Design and Manufacturing Integration through EDIF
Hilary J. Kahn, University of Manchester

Effects of Fab Automation on Factory Efficiency
Michael Brain, Richard Gould, and Brian Wehrung, Palo Alto Technologies

Automation Concept for Complex Production Processes
Gerhard Luhn, Bernhard Stoschek, Horst Schilling, Andreas Kindelberger, Mandy Vogel, Michael Foerster, and Roland Kampfrath, Infineon Technologies

Advanced Interconnect Technology I
Chairs: Bob Monroe and Craig Beddingfield, Motorola

Critical Variables of Solder Paste Stencil Printing for Micro-BGA and Fine-Pitch QFP
Jianbiao Pan, Gregory L. Tonkay, and Robert H. Storer, Lehigh University; and Ronald M. Sallade and David J. Leandri, Visteon Automotive Systems

Adaptive Fuzzy Control of Solder Paste Printing: The Identification of Deposit Defects
M. Howarth and A. Lotfi, Nottingham Trent University

Thermosonic Ball Bonding: Friction Model Based on Integrated Microsensor Measurements
Jürg Schwizer, Michael Mayer, and Henry Baltes, Physical Electronics Laboratory; Oliver Paul, University of Freiburg; and Daniel Bolliger, ESEC

Technical Leverage with Reel-to-Reel Tape Manufacturing
Ralph Parsons and Polly Gregory, International Flex Technologies

Use of the Area-of-Spread Method for Monitoring the Stability of Reflow
W. Lawson and N. N. Ekere, University of Salford

How to Assemble a Large PBGA on PCB Reliably with a Large PQFP Directly on the Opposite Side
John Lau and Ricky Lee, Express Packaging Systems

noon—1 p.m.

Keynote Address

Design and Manufacturing at the National Science Foundation: Past, Present, and Future Perspectives
Louis Martin-Vega, National Science Foundation

1:30—5:30 p.m.

Array Packaging II
Chairs: Jan Vardaman, TechSearch International; and Richard Coyle, Lucent Technologies

Flip-Chip Contacts for High-Current Conducting Assemblies
Erik Jung, Ria Isa, J. Kloeser, R. Aschenbrenner, and H. Reichl, FhG-IZM

Fine-Pitch Low-Cost Bumping for Flip-Chip Technology
Szu-Wei Lu, Ruoh-Huey Uang, Kuo-Chuan Chen, Hsu-Tien Hu, Ling-Chen Kung, and Hsin-Chien Huang, Industrial Technology Research Institute

Wafer-Level Known Good Die Technology for Direct Chip Attach Applications
Craig Beddingfield, Walid Ballouli, Frank Carney, and Raj Nair, Motorola

Evaluation of Eutectic Solder Bump Interconnect Technology
Craig Beddingfield, Addi Mistry, and Qing Tan, Motorola

Eutectic Bump Evaluation with Various Passivation and Polyimide Structures
Addi Mistry, Kartik Ananthanarayan, Craig Beddingfield, Dianne Mitchell, Qing Tan, Vijay Sarihan, and Varughese Mathew, Motorola

Effect of CSP Rework on Surface Intermetallic Growth
J. D. Philpott, T. A. Nguty, N. N. Ekere, and R. Solomon, University of Salford

Failure Mechanisms of Solder Bumped Flip-Chip on Low-Cost Substrates
John Lau, Chris Chang, and Ricky Lee, Express Packaging Systems

Semiconductor Technology I
Chairs: Walt Trybula, Sematech; and Kazumi Allen, Shindo

Electrically Activated Fuses for DRAM Applications
Axel C. Brintzinger, Siemens Microelectronics; and Chandrasekhar Narayan and Kenneth C. Arndt, IBM

Wafer-to-Wafer Direct Bonding Using Surfaces Activated by Hydrogen Plasma Treatment
W. B. Choi, C. M. Ju, and Man-Young Sung, Korea University; and B. K. Ju, KIST

Assessment of Backside Processes through Die Strength Evaluation
Betty Yeung, Vern Hause, and Tom Lee, Motorola

Integrating Risk Assessment into EHS Systems
Steven Trammell and Ronald Wright, Motorola

Compatibility of Gas Filters with HBr Gas
Jim Snow, Millipore; and Mutsuhiro Amari, Isamu Funahashi, Yasushi Ohyashiki, and Kuniyoshi Takahara, Nihon Millipore

Applications of Supercritical Carbon Dioxide for Semiconductor and MEMS Processing
Ijaz H. Jafri, R. B. Farmer, M. Chandra, and H. D. Moritz, GT Equipment Technologies; and J. B. Rubin, L. B. Davenhall, T. Pierce, and G. B. Ansell, Los Alamos National Laboratory

Producing Stress- and Fault-Free Epitaxial Silicon over Buried Antimony Layers
Thomas J. Turner and Scot Petersen, Micro-Rel Div., Medtronic

Advanced Interconnect Technology II
Chairs: Ndy Ekere, Salford University; and Lakhi Goenka, Visteon

A Model of the Distribution of Interconnectivity through Multiple System Levels and the Impact of Different Design Strategies and IP Reuse on Design Effort
Paul J. Palmer and David J. Williams, Loughborough University

An Investigation into the Printing Characteristics and Mechanical Dynamics of Advanced Squeegee Mechanisms
Martin Howarth, S. Silvester, M. Lacey, and S. Sivayoganathan, Nottingham Trent University

Copper: Migrate or Bust?
George Deltoro, Comdisco Electronics Group

Closed-Loop Feedback for Continuous Mode Materials Jetting
M. Lovelady and J. D. Watts, Nortel Technology

Low-Temperature Gold Wire Bonding
Yiu Ming "Ken" Cheung, Siu Wing "Derek" Or, and Stephen Ching, ASM Assembly Automation

Analysis of Copper Plating Baths—New Developments
Beverly Newton, Dionex

Ultrasonicmicroscopy for the Inspection in the Electronics
Andreas Herenz, Dietmar Daniel, and Klaus-Jürgen Wolter, Dresden University of Technology

TUESDAY, OCTOBER 19

8:30 a.m.—noon

Array Packaging III
Chairs: Qing Tan, Motorola; and Lahki Goenka,Visteon

Reliability Assessment of Thin (Flex) BGA Using Polyimide Tape Substrate
Armando Carrasco and Trent Thompson, Motorola

Flip-Chip Fine Package and Its Assembly Line Development for GaAs MCM
Hiroyuki Kurata, Toshihiro Ogata, Kaora Mitsuka, Hikari Matushita, and Chikao Kimura, New Japan Radio

An Experimental Study of Fatigue Strength Characteristics of Beam Lead Material in µBGA Package
Hyouk Lee, Jun Hyub Park, Ho Jung Moon, and Se Yong Oh, Samsung Electronics

Warpage Control Study on Thin Mold Array Package
Elisa Huang, Susan Downey, Trent Thompson, and Scott Chen, Motorola

Development of a Chip-Scale Package for DRAM
T. J. Cho, E. C. Ahn, J. H. Lyu, K. W. Choi, and S. Y. Oh, Samsung Electronics

Trends in High-Density Substrates for IC Packages
E. Jan Vardaman and Doug Feicht, TechSearch International

Plastic Strain in Thermally Cycled Flip-Chip PBGA Solder Balls
E. S. Drexler, NIST

Semiconductor Technology II

Chairs: Eric Jung, FhG-IZM; and Paul Palmer, Loughborough Universtiy

Vertical MOS Transistor with Threshold Voltage Adjustment
Kiyoshi Mori, Sony Semiconductor

A Framework to Encourage Step-Change Reduction in Environmental Impact in the Creation of Electronics Products
M. K. Low and D. J. Williams, Loughborough University

Yield Improvement at the Contact Process through Run-to-Run Control
Kareemullah Khan, Victor Solakhian, and James Moyne, University of Michigan; Tarun Parikh, Sematech; and Jonathan Chapple and John Colt, IBM

Abatement of Emissions from Advanced Chemical Vapor Deposition Processes
Laura Mendicino, Paul Thomas Brown, Kim Reid, and Victor Vartanian, Motorola

Study of Gate-Oxide Breakdown Influenced by RCA Clean
H. H. Chang, TSMC

Effects of Stress Concentration on Metal Voiding during Dielectric Deposition
Munir D. Naeem, Phillip Fleitz, and D. Chidambarrao, IBM Microelectronics

Advanced Interconnect Technology III
Chairs: Achyuta Achari, Visteon; and Jim Steele, Medtronic

Application of Holography to Evaluate the Thermal Deformation of Printed Circuit Connector Due to Thermal Stress
Masanari Taniguchi, Meijo University; and Tasuku Takagi, Tohoku Bunka Gakuen University

Component Attachment in Lithographic Film Circuits
Peter S. A. Evans, Blue Ramsey, P. M. Harrey, and David Harrison, Brunel University

Postprocessing of Conductive Lithographic Films for Electronic Interconnects
Darren Lochun, Blue Ramsey, and David Harrison, Brunel University; Sue Green, Shipley; and Eileen Jarrett, Tullis Russell Papermakers

Plated Copper on Ceramic Manufacturing Technology Advances into RF and CSP Assembly Systems
Leon Balents, Ken Christopher, and Dan Skoczylas, Zecal

Correlating Solder Paste Composition with Stencil Printing Performance
N. N. Ekere, A. Adebayo, and T. A Nguty, University of Salford

1:30—5:30 p.m.

Array Packaging IV
Chairs: Paul Harvey, 3M; and Scott Popelar, IC Interconnect

Approaches to Evaluating Lifetime RC Delay of Copper Interconnects
Ming Sun, University of Maryland

The Bumping of Silicon Wafers by Stencil Printing
James H. Adriance, Universal Instruments

Reliability Evaluation of Probe Process for Electroless Bumping Technology
Qing Tan, Craig Beddingfield, and Addi Mistry, Motorola

Pilot Production of High-Density Solder Bumps by Electroplating Technology
Szu-Wei Lu, Zhao-Hui Wu, Yuh-Jiau Huang, Ruoh-Huey Uang, Wei-Chung Lo, Hsu-Tien Hu, Yu-Fang Chen, Ling-Chen Kung, and Hsin-Chien Huang, Industrial Technology Research Institute

A Bumping Process for 12-in. Wafers
Thomas Oppert, T. Teutsch, and E. Zakel, Pac Tech—Packaging Technologies

Alternative Low-Cost Solder Bumping Technologies for Flip-Chip Interconnection
D. A. Hutt, P. P. Conway, S. H. Mannan, and D. C. Whalley, Loughborough University

High-Density Chip Carrier: A 50-(omega) Impedance Solution with a 2* Increase in Wire Density for Flip-Chip Applications
J. Knickerbocker, M. Cranmer, D. Gupta, J. Humenik, D. O'Conner, and P. O'Leary, IBM

Semiconductor Technology III
Chairs: Paul Thomas Brown and Laura Mendicino, Motorola

The Chamber Memory Effect Induces P+ Junction Leakage and EEPROM Tunneling Oxide Degradation
C. D. Chang, Y. C. Lin, C. H. Liao, D. E. Lin, Y. J. Chu, and S. L. Pang, TSMC

Using Rinse Resistivity to Reduce UPW Usage
Kathleen McCormack, Motorola; and A. Ruiz-Yeomans, University of Arizona

Time Series Modeling of Photosensitive BCB Development Rate for Via Formation Applications
T. Kim and Gary May, Georgia Institute of Technology

Correlation of Observed Stability and Polishing Performance to Abrasive Particle Size for CMP
Byron J. Palla and Dinesh O. Shah, University of Florida

The Performance of Two Purification Media in Their Removal of Impurities from Inert Gases
Jian Wei, Dmitry Kondrashov, and Armando Colorado, Millipore

Reducing Complexity of Wafer Flow to Improve Quality and Throughput in a Single-Wafer Cluster Tool
Hilario L. Oh, Silicon Valley Group

Reliability of Laser-Activated Metal Fuses in DRAMs
Kenneth Arndt, C. Narayan, W. Guthrie, D. Lachtrupp, J. Mauger, D. Gilmour, and S. Lawn, IBM Microelectronics; and A. Brintzinger, Infineon

System Specific Packaging
Chairs: Michelle Salagoity, Solectron; and Keith Vanderlee, 3M

Tools for System Specific Packaging for Electromechanical Systems
S. M. Hyslop, P. J. Palmer, and David J. Williams, Loughborough University

Packaging of High-Resolution Si-Based Spatial Light Modulators for Display Applications
C. Narayan and R. Horton, IBM

Integration of Arrayed Wavelength Division Multiplex Components into an Optical Add Drop Module Transmitter and Receiver
Ewa Lisicka, H. Hua, R. James, E. Berolo, and W. J. Wang, Communications Research Center; and J. J. He, B. Lamontagne, L. Erickson, A. Delage, M. Davies, and E. S. Koteles, National Research Council

Over 10-GHz Equivalent Circuit Model of ACF Flip-Chip Interconnect Using Ni-filled Balls and Au-coated Polymer Balls
Seungyoung Ahn, Woonghwan Ryu, Myung-Jin Yim, Junho Lee, Young-Doo Jeon, Woo-poung Kim, Kyung-Wook Paik, and Joungho Kim, Korea Advanced Institute of Science and Technology

High-Thermal-Performance Silicon Heatspreaders with Microwhisker Structure
E. Hammel and H. Nagl, Electrovac; and Gernot Hanreich and J. Nicolics, Vienna University of Technology

Flip-Chip Die Attach Development for Multichip Mechatronics Power Packages
Mervi Paulasto and Torsten Hauck, Motorola

A New Generation of Interconnect Technology for High-Performance Electronics
Mohammed Kasem, Siliconix

(Program information was correct at press time.)

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