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Microcleaving System Helps Ease FA Sample Prep Bottleneck at Motorola
More than ever before, chipmakers face the problem of finding and eliminating costly, difficult-to-detect killer defects within rapidly shrinking device dimensions. Adding to this pressure, semiconductor manufacturers must maintain or reduce costs and cycle times in order to remain competitive. The 1997 SIA roadmap noted that scanning electron microscopy (SEM) evaluations, routinely performed in failure analysis (FA) labs, are "not well suited to on-line use" in today's fab operations. With long overall cycle times and high costs, FA procedures are often segregated as a secondary support service, not integrated into primary fab operations. In an effort to boost overall productivity, Motorola (Austin, TX) teamed with Sela (Yokneam Elite, Israel/Sunnyvale, CA), a developer of microcleaving systems for sample preparation, to improve operations in the FA lab, achieving a nearly tenfold reduction in sample turnaround time.
FA labs are frequently involved in the development of new materials, processes, and equipment, as well as in the transition of new technologies into full production. To help fine-tune fabrication techniques, SEM analysis is used to evaluate material thickness and interfaces or causes of device failures and poor results on in-process wafers. Once procedures are mature, FA acts as a standard process control method, helping to maintain the overall process at optimal parameters by determining the integrity of specific process steps. SEM analysis may also be used to requalify fab equipment brought down for scheduled maintenance or unscheduled repair. If there is a bottleneck in any of these operations, it can significantly slow the pace of all facets of production and development.
SEM image of sample containing photoresist after microcleaving, which bolsters the sample preparation process and improves failure analysis productivity.
Routine evaluations of FA operations are a necessary part of ongoing technology development. Following past evaluations, Motorola developed tracking systems to align sample priorities more closely with respective wafer lots from the fab. The chipmaker also increased throughput by building SEM sample holders for simultaneous evaluation of multiple samples. Following another such evaluation, engineers installed the Sela MC200 microcleaving system to bolster the sample preparation process and improve FA productivity.
The microcleaving technique replaces inefficient, conventional sample preparation techniques. For example, using the traditional hand-cleave-and-polish method, the technician, through a combination of skill and luck, can only position the cleave to within approximately 50 µm of the target. In a time-consuming process, the sample must subsequently be polished and checked repeatedly until the feature is exposed.
By integrating high-magnification optics with precision positioning tools for accurate scoring and cleaving, microcleaving achieves a target accuracy of at least 0.5 µm. The cleave automatically aligns with the silicon's crystal-lattice structure and produces an artifact-free break. To support analysis of advanced copper devices, the microcleaving tool incorporates a liquid nitrogenfilled cryocooling system, which helps cleave the wafer despite copper's characteristic soft consistency.

After the installation of the microcleaving system, FA turnaround time decreased while productivity increased.
For a larger view - 600 pixels wide.
The focused ion beam (FIB) process, another FA sample prep method, uses ions to mill away the surface and sides of the sample to expose the desired feature, producing a beveled cross section from the wafer. Accurate but very slow and inefficient, the process requires high maintenance expenditures and extensive training. Like the hand-cleaving method, the FIB yields one cross section per sample, since the other half is destroyed in the milling or polishing stages. In contrast, the microcleaving process bisects the desired feature, producing two mirror-image samples from each original sample, with an average cycle time of 15 minutes.
Three years ago, personnel at Motorola's Advanced Products Research and Development Labs (APRDL) in Austin, TX, performed many cross sections using the hand-cleave-and-polish technique. Since integrating the microcleaving system into the facility, sample throughput has increased fivefold, with sample preparation time consistently between 10 and 12 minutes. This compares with a 50-minute average preparation time achieved with the hand-cleaving method. When microcleaving was combined with other changes in SEM procedures, overall sample cycle times were reduced almost tenfold.
The elimination of the FA bottleneck has had a ripple effect across APRDL fab operations, according to David Sieloff, analytical lab manager. "For example, new tools and process techniques are developed more quickly because of faster FA feedback. Since the lab develops technology for several production facilities, these improvements can accelerate our time to market for many new products."
SEM cross-section image made after microcleaving.
Similar reductions in cycle times were achieved after integrating the microcleaving tool into other Motorola FA lab facilities. At MOS-6 in Arizona, SEM lab group leader Vickie Allison commented that "the microcleaving system empowers the technicians, enabling less senior personnel to perform at the same high levels as more experienced staff. Additionally, results have had a wider impact, such as a reduction in SEM lab cycle time, which can improve productivity, boost competitiveness, and cut overall costs."
Improvements in metrology will continue to be a critical arena for enhancing productivity and fulfilling the wider industry goal of reducing cost per function by 25%. The semiconductor industry must constantly evolve to meet increased efficiency demands, lower the cost of production, and speed the introduction of new technology. Sela's microcleaving technology has become an important tool for meeting these objectives and has had a positive impact on process development, quality control, throughput, and industry competitiveness.

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© 2007 Tom Cheyney
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