INDUSTRY NEWS

Korean researchers claim new 'super silicon wafer' improves yields, lowers production costs

Researchers developing a "super silicon wafer" claim the substrate will improve yields and reduce manufacturing costs for 256-Mb DRAMs and beyond. Working on a joint development project, a team from Samsung Electronics and Hanyang University in South Korea has combined two technologies to remove defects from the surface and active areas of 8-in. silicon wafers. The integrated method also removes heavy-metal contaminants.

The combined techniques could possibly reduce the cost of wafer production by 40%, compared with the added epitaxial process steps used to produce high-quality epi silicon wafers, according to managers at Hanyang University's advanced semiconductor material and device development center.

Semiconductor manufacturers will need high-quality wafers in order to manufacture next-generation chips, the Korean researchers point out. However, they emphasize that growing the defect-free crystals that would be required for a "perfect" silicon wafer is an expensive, time-consuming proposition that would increase the overall cost of the starting substrate.Some materials experts have proposed depositing a thin layer of epi silicon on substrates made of lower-grade silicon, the researchers note. But the steps required to remove defects from the wafers, particularly the epi process and high-temperature annealing, can warp the substrate and add approximately 20% to the initial cost of wafers. Another worry is the increased risk of heavy-metal contamination in the silicon.Both Samsung and Hanyang University have applied for patents on the techniques for manufacturing the "super silicon wafers," and a technology transfer is in the offing with a Japanese materials supplier. The researchers are also trying to create a 300-mm version of the substrate.

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