INDUSTRY NEWS

Survey majority sees copper chips coming in volume by 2002; availability cited as main barrier

Most respondents to a copper-interconnect survey believe that semiconductor manufacturers will begin producing copper-based ICs in volume by the end of 2001 or the beginning of 2002. Launched in San Francisco last July at the Semicon West 99 trade show, the poll shows that 63.7% of the respondents predict copper chips will be in full production in the 2001— 2002 time frame. More than 265 participants replied to the Copper Critical Survey, which was sponsored by SEMI and Philips Analytical. Respondents represented a cross section of the industry.

Nearly 77% of the respondents believed that the level of acceptance of copper-based chips by customers is moderate to high. Approximately 42% of this same group said that current customer acceptance is above average to high.

Opinions among the participants were fairly evenly divided as to the main barriers to customer acceptance of copper. Availability of the chips was cited as the principal showstopper by 46.6% of the respondents. Thirty-nine percent of the participants said that performance is a major concern, while 32.2% cited price as the primary barrier to customer acceptance. (Respondents were permitted to check more than one category.)

Slightly more than 30% of the respondents work for semiconductor manufacturers. Another 11% of the respondents are associated with materials manufacturers, while 8.4% are from equipment manufacturers, 4.2% are independent R&D lab researchers, and 1.5% are industry consortium members.

A complete report on the survey results will be presented October 19 during a copper-readiness briefing at Semicon Southwest 99 in Austin, TX. Technology trends will be addressed at the meeting. Among the questions to be considered are when respondents expect to ship their first copper-based tools or materials and what types of materials are being used for interlayer dielectrics. The meeting also will reveal how prepared the respondents' companies are for copper processes in areas such as dielectric and barrier deposition, etch and polish stops, and copper CMP. Results of the respondents' answers to questions of yield and reliability issues will also be outlined.

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