VIEWPOINT

Beyond the wafer surface: Moving toward holistic, systemic process engineering

Jim Irwin

When we were exploring the use of steppers in submicron lithography at IBM back in the good old days of the late 1970s, one of my mentors, Rick Ruddel, used to say, "Look to the silicon." He encouraged us to think first about what was supposed to be happening on the wafer surface as a starting place in any process engineering challenge. This approach served my coworkers and me very well for many years. But then we came up against some fundamental limits of usefulness. We began to notice increasingly complex process interactions, and the idea of a closed-loop, controlled litho cell became popular—until the 1985 recession, that is!

Interactions between resist thickness and standing wave optics came to be understood. Later, at GCA, we began investigating image development process endpoint detection, which made huge gains possible. We found that one process parameter could be adjusted to compensate for normal variations in other parameters, yielding far tighter process results over a broad range of natural (even unnatural) variations. Sensors and integrated control subsystems went into the proposal and development stages.

Then we examined the optimization of product-handling logistics through the factory. Automation was all the rage in 1984 and was among the first kinds of development pursuit canned during the dark days of 1985. Still, over the past 15 years there has been a slow, general migration toward the realization of the need for integrated, statistically controlled, closed-loop, feed-forward and feedback process control. The historical evolution from the old ways of process engineering to the recent advances in process control merits review from an equipment point of view.

Historical Perspective

Until the late 1980s, equipment was either "up" (available) or "down" (not running). Mean times between failures were small, say 24 hours or so, and success was measured by how fast you got the equipment back up and running again. Process results meant getting some good yields out of any number of wafers run through a tool (an operation). If anything went bad on the wafer, the last tool it went through was shut down and "fixed." Sometimes we found the problem was really misprocessing from an earlier step, but generally we first looked close to home.

The mid-1980s brought statistical process control (SPC) to the fore. SPC forced some equipment to be shut down for "out of control" performance. Equipment maintenance technicians had to do a lot of fast learning to adapt to this new method, and cries of "whaddya mean it's down, it's running fine!" and "how do I fix something that ain't broke?" rang through the fabs. But yields and process control vastly improved in a hurry.

Figure 1: Breakdown of intrinsic equipment efficiency (IEE), which examines productivity losses within the tool's total processing cycle.

The early 1990s heralded the arrival of cost of ownership (COO) and cost of equipment ownership (CEO) on the scene, techniques that looked at the total cost per unit produced by a tool over its entire life, including initial price. COO and CEO also examined all tool costs and other related costs of using, maintaining, and disposing of a tool. What we found out was that we weren't pay-ing nearly enough attention to nearly enough parameters.

The mid-1990s arrived and so did the concept of total productive manufacturing (TPM). We began to take a more holistic view of work at a "node" in the process flow, since the equipment is the most constant, visible manifestation of that node. We also worked to improve the overall equipment efficiency (OEE), reducing utilization losses from theoretical maximum flow at constraint tools.

Now, in the late 1990s, we are developing ever-finer analyses of intrinsic equipment efficiency (IEE), which looks at productivity losses within the tool's total wafer processing cycle. From wafers being brought into the tool, to pumpdown and vent up, on to the wafers being brought out to the output position, even the time that wafers spend sitting at the input waiting for their turn to go into the tool or at the output waiting for the last wafer to complete processing, all this non-value-added time matters to the new, holistic process engineer (see Figure 1).

All of the above are toolcentric attempts to measure and maximize manufacturing efficiencies. But what about an even more thorough, systemic approach?

A More Systemic Approach

High-integrity data are critical to current fabs, not just those of the future. Equipment performance data are increasingly being reported by the equipment controller itself, hopefully using standard SECS and ARAMS protocols. But how closely does the information being reported by our subsystems resemble the truth? Does the control algorithm inside the XYAZ cluster tool treat the need to report this information at the same priority level as the performance of its other functions? Or does it defer this reporting until there is nothing more important to do, thereby giving nonsensical information on equipment performance that then ripples through the entire organization?

Efforts at Sematech to model and measure fabwide capital productivity led to an appreciation of the startling effects of equipment reliability and utilization (and later OEE). When you model a completely balanced entity as complex as a fab, you see the relatively enormous perturbations introduced by unpredictable tool performance, which leads to the difficulties of establishing or maintaining a smoothly running fab.

In the early 1990s, we in the process engineering community became aware of the apparent but largely uncharacterized value of automated material handling systems (AMHS); these now-critical subsystems have the potential to add flexibility to material flow dynamics. If a node in the AMHS goes down, performance may degrade somewhat, but production can proceed if the material control system (MCS) and the manufacturing execution system (MES) are flexible enough to handle the excursion.

MCS and MES have become ever more closely associated with accurate, dynamic fab models. Automated tracking systems monitor both the theoretical and actual locations of key resources, allowing the larger system to route these resources to their next destination just in time, with minimal delays. Automated system performance monitoring has just begun to be evaluated to control equipment performance. Automated process control theory is being applied to adjust equipment parameters on the fly to ensure end results within incredibly tight tolerances.

A few equipment companies are beginning to apply formal reliability engineering principles to the testing and design of new tools to increase availability and to minimize unscheduled downtime and repair and maintenance time losses. In life-or-death situations such as the Space Shuttle and the International Space Station, extremes of reliability and value per function are demanded and delivered. There is much the semiconductor equipment industry could learn by applying these principles, both in the hardware and software areas. In order for the semiconductor industry to achieve more mature levels of process control and tool reliability, it's time to redefine some well-worn concepts.

Redefining Process and Defects

The concept of process includes far more than just what happens on the wafer surface. It includes the flow of material, consumables, workers, tools, recipes, and information. Management by workflow systems, policies, and procedures can only be successful to the extent that the total process is thoroughly understood and carried out in a closed-loop, real-time manner. This is why accurate models are so critical to today's fab control system.

The concept of process defect means much more than just what shows up on the wafer surface. This broader definition encompasses any error, failure, or out-of-control condition in the total process, such as data errors; misdiagnosed equipment failure modes; preventive maintenance errors; and people, system, or software errors in reporting events. Any resource that ends up in the wrong place at the wrong time—"losing" wafers in the fab, for example—can be called a process defect. Purchased supplies or repair parts that arrive late or are out of stock; necessary personnel who are not hired or trained on time; mismanaged vacation scheduling that leads to resource problems; power, water, or other utility interruptions; and other logistics errors in the various support functions also can be categorized as process defects.

These nontraditional process defects can and do cause huge economic losses in today's fabs. Controlling them is the next process engineering frontier. In order to do so, more and more intelligence is needed at every node in the process, intelligence that is integrated with other nodes and with the enterprise's central nervous system, to produce a highly flexible, responsive, and efficient manufacturing entity.

Holistic Process Engineering

The big picture reveals clear signs that "our" chips and even the PCs, cellular phones, networks, entertainment gadgets, and the like that they go into have become commodities. Competition is keen and cutthroat, and margins are plummeting. The companies that survive and stay in business over the next few decades will be those that manage ever-more-complex systems as organic, living beings, with aches and pains, diseases, symptoms, treatments, tonics, and cures very much like those for an individual. Process engineering is becoming a very holistic art and science. The engineer's new skill set will be essential in dealing with the next critical defect control issue—the flawless integration of numerous, disparate subsystems into the massive, distributed control monoliths that our wafer fabs are becoming.

James A. "Jim" Irwin is principal of Irwin Consulting (Austin, TX), an affiliate of VLSI Research. He specializes in process engineering, including both manufacturing and business processes, as well as project design and management. A veteran of more than 30 years in the semiconductor industry, he has worked at IBM, AMD, TI, GCA, Ultratech Stepper, and Sematech. His accomplishments include developments in and management of semiconductor processes and equipment, particularly in photolithography and fab automation, and fab productivity enhancement programs. Irwin formed and led the SEMI E10-96 and E79-0299 standards teams. He has a BS in industrial technology from Texas A&M in College Station. (Irwin can be reached at 512/ 502-0797 or irwin@kdi.com.)

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