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Building CopperopolisUsing TOF-SIMS to inspect copper-patterned wafers for metal contaminationHugh Li, Diane J. Hymes, and John de Larios, OnTrak Systems, a subsidiary of Lam Research; and Ian A. Mowat and Patricia M. Lindley, Charles Evans & Associates The prospect of implementing copper deposition technology for the next generation of interconnect wiring has generated a great deal of R&D activity in both the semiconductor manufacturing and equipment industries.1 Copper is significantly less resistant than alumi-num, the most widely used interconnect material, and this attribute reduces the resistance-capacitance delay that becomes significant at 0.18-µm and smaller linewidths.2,3 However, if copper is to be incorporated successfully into wafer metallization processes, many challenges must be overcome.4,5 One such challenge relates to the patterning of copper features. Because of the difficulty of dry-etching copper, a damascene or dual-damascene metallization technique that includes chemical-mechanical planarization (CMP) has become the process of choice.6–8 In a damascene process, instead of depositing metal and then etching back the dielectric, the dielectric is patterned before the metal is deposited as a film, filling the openings in the dielectric. The film is then polished using a CMP slurry to reveal the metal features. This approach to defining copper interconnect structures achieves the desired local and global planarity while minimizing process-related defects. CMP, however, is an intrinsically dirty process, and gross amounts of contamination are left on the polished surfaces.9 Particles may come from the slurry abrasives, polishing pads, pad conditioners, and the polished material itself, while metallic and organic contaminants may come from the same sources. In the case of a copper interconnect structure, copper residue in the dielectric regions or on the silicon substrate backside can easily diffuse to the gate level, where it can affect the minority carrier lifetime and cause device failure. Therefore, the availability of a post-CMP cleaning process that effectively removes contamination from all regions of the wafer (front, back, and edge), leaving a clean surface for the subsequent process steps, is critical to the adoption of copper technology.10,11 New analytical techniques capable of identifying and quantifying the metallic contaminants on patterned wafer surfaces with a high degree of sensitivity are also required.
Inspection tools based on light scattering are commonly used to quantify particle contamination and other wafer surface defects, and total reflection x-ray fluorescence (TXRF) spectroscopy is used routinely for the analysis of metallic contamination. While the latter method provides relatively high sensitivity on blanket wafer surfaces, it requires a flat sample area at least 30 mm diam and thus is not well suited for the analysis of patterned wafers where the areas of interest are measured in microns. For such applications, time-of-flight secondary ion mass spectrometry (TOF-SIMS) offers an alternative.12 A schematic of the TRIFT II mass spectrometer (Physical Electronics; Eden Prairie, MN) is shown in Figure 1. A highly versatile and ultrasensitive technique, TOF-SIMS can be used to analyze samples in the 0.5–500-µm size range on a patterned wafer. Depending on the size of the sampled area, semiquantitative or quantitative chemical information may be obtained, along with the lateral distribution of the species of interest. This article describes a joint research project undertaken by OnTrak Systems (Milpitas, CA) and Charles Evans & Associates (Redwood City, CA) that evaluated the use of TOF-SIMS for the inspection of residual metallic contamination on the dielectric regions of copper interconnect wafers. The data generated were also used to confirm the performance of a post-CMP cleaning process that was then being developed by OnTrak. TOF-SIMS Capabilities In the dynamic SIMS technique, which is used widely for depth-profiling applications such as implant characterization, the sample of interest is sputtered (or eroded) away by a continuously operating primary ion beam. The secondary ions created in this sputtering process are generally atomic in nature. In contrast, TOF-SIMS instruments operate in or near the so-called static SIMS regime, the primary ion gun operates in a pulsed mode, and the ion bombardment of the surface is much more limited.13–15 Thus, the sample is generally not sputtered away and the secondary ions that are detected are reflective of the immediate surface area. The typical analytical depth of TOF-SIMS is the top few monolayers of the sample (approximately 10 to 30 Å, depending on the surface). A further advantage of TOF-SIMS is its parallel detection capability. Because the flux of primary ions is extremely low, molecular as well as atomic species are observed. The molecular information enables rapid characterization of the species present on a surface with a higher sensitivity and specificity than with other surface analysis techniques, such as x-ray photoelectron spectroscopy (XPS) or Auger electron spectroscopy. The high mass resolution (a measure of the peak width) of TOF-SIMS also makes it possible to distinguish ions of similar nominal mass from each other.16 For example, iron (55.9349 Da) can be distinguished from Si2 (55.9539 Da), and copper (62.9296 Da) can be distinguished from SiCl (62.9458 Da). This high performance level, which is possible on both conducting surfaces (such as native oxides) and insulating surfaces (TEOS, thermal oxides, and low-k dielectrics), is achieved in two ways: by compressing the primary-ion-beam pulse to less than a nanosecond (known as bunching), and by compensating for the kinetic energy spread of ions leaving the surface. In the TRIFT II instrument, an energy-focusing, triple electrostatic array accomplishes these tasks. Although TOF-SIMS is highly sensitive for detecting both atomic and molecular species, its major disadvantage is that the resulting data are not absolutely quantitative unless standard materials or samples are used for calibration. Alternatively, results may be correlated with those from other techniques, such as TXRF, XPS, or Rutherford backscattering spectrometry. Research at Charles Evans & Associates into the use of TOF-SIMS for wafer analysis has led to the development of relative sensitivity factors (RSFs) for many atomic species on native oxide silicon surfaces. These RSFs can be used to relate the measured signal intensity from a surface ion (in arbitrary units of ion counts) to the actual concentration of that ion on the surface (in atoms per square centimeter). The joint OnTrak/Charles Evans study confirmed that these RSFs are generally applicable to elemental contamination on the oxide surfaces of copper test wafers as well. Although TOF-SIMS detection limits are element specific, they are typically in the 107-atom/cm2 range for alkali metals and in the mid-109-atom/cm2 range for copper. Another unique strength of TOF-SIMS is its imaging capability. The instrument has a built-in microscope, allowing the sample area to be viewed optically. Imaging species on a surface can provide information on contaminant concentrations at extremely specific locations and on the lateral heterogeneity of surface species. Such information, in turn, may indicate problems with the CMP process's polishing efficiency, especially if there are large variations in copper intensity or if barrier materials such as tantalum are observed. During imaging analysis, the TOF-SIMS instrument's primary ion beam is rastered across the area of interest and the lateral locations of selected species can be viewed. The analytical area is a square that can be varied from 5 to 500 µm. Depending on the specific experimental conditions, an image resolution of about 0.2 µm may be obtained. However, such a high performance level may not be necessary if the features of interest are large or if very high sensitivity is of prime importance. In recent analyses, quantitative information has been obtained from features that were <5 µm apart. A further benefit of TOF-SIMS is its full-wafer analysis capability. In the model used in the joint study, the sample stage is fully computer controlled so that the coordinates of the various analytical areas on a wafer can be stored for future reference—for example, for the reanalysis of specific areas after a subsequent cleaning step or for comparison with identical patterned areas on a different wafer. In addition, the computer-controlled stage is compatible with various defect map formats, such as those used with KLA-Tencor instruments. This means that after a light-scattering inspection tool is used to find and map defects, TOF-SIMS can be used to analyze and identify those defects. The effective size limit for such analyses is defects larger than 1 µm. Experimental Procedures During the joint research study, patterned wafers with copper interconnects were polished back to the underlying field oxide (TEOS) film using a CMP process under investigation by Lam Research. The wafers were then cleaned with an OnTrak Synergy system using various proprietary copper cleaning formulations. This double-sided scrubbing system combines wet-chemical and mechanical action to remove polishing residues. The cleaning chemistry is delivered through the core of polyvinyl alcohol brushes onto the wafer surface. The cleaned wafers were then sent to Charles Evans, where they were analyzed for residual metallic contamination using the TRIFT II TOF-SIMS instrument. Depending on the amount of metallic contamination found on these wafers, modifications were made to the cleaning process with the goal of reducing the contamination levels.
Most of the data presented in this article were acquired by TOF-SIMS under high-mass-resolution conditions from one of three areas on the test wafers: on the field oxide near the wafer origin (a low-pattern-density area), on the field oxide near the test arrays (a medium-pattern-density area), and from the oxide between the copper lines within the test arrays (a high-pattern-density area). The approximate sampling locations can be seen in Figure 2. Spectra were acquired using a nominal primary ion beam (69Ga+) current of 20 nA. This current is specified for operation in a dc mode; however, because time-of-flight measurements are performed in a pulsed mode, the actual beam current was much lower than the nominal current—in this case by a factor of 10,000 as the instrument operated at 10 kHz under the TOF conditions. One refinement to the experiment was the use of "region-of-interest" spectra when acquiring and analyzing data from between the copper lines within the test arrays. Because the copper lines in the arrays were 100 µm apart and an area of 120 µm2 was analyzed, if all the secondary ions had been collected into one spectrum, then some originating from the copper lines would have been included and the copper concentration would have been anomalously high. To avoid this, only ions originating from the center section of the oxide (approximately 60 µm wide) were summed into a mass spectrum. In other words, ions originating from the copper lines were included in the ion images but did not contribute to the mass spectra from which the copper concentration on the oxide was determined.
Table I: Comparison of TOF-SIMS and TXRF analyses of residual copper contamination (in atoms/cm 2). Results and Discussion Correlation of TOF-SIMS and TXRF. To determine whether TOF-SIMS results correlated with those of TXRF, the de facto standard for analyzing metallic contamination, some wafers were examined using both techniques. Table I compares the copper concentrations on three areas where both TXRF and TOF-SIMS measurements were taken. Generally, the TOF-SIMS measurements were within a factor of two of the TXRF measurements. Considering that the size of the TOF-SIMS analytical area (~10–4 cm2) is much smaller than that used for TXRF (1 cm2), this agreement is quite good. Further refinement of the TOF-SIMS RSFs is likely to lead to even better agreement between the two techniques.
Using TOF-SIMS for Process Optimization. Comparing TOF-SIMS results for process variations can help developers optimize such wafer processes as CMP and post-CMP cleaning, thereby reducing the metal contamination levels that contribute to device failures. With optimized processes, wafer yield can increase significantly. The usefulness of TOF-SIMS data is illustrated in Figure 3. Figure 3a shows the copper ion image of a 60-µm2 area on a patterned wafer after CMP and post-CMP clean A. The light areas are the copper lines and the dark areas the field oxide regions. The copper lines in this case were 10 µm wide and had a 20-µm pitch. Below the image is the normalized plot (Figure 3b) of the copper ion counts along the highlighted line drawn across the array in the image. Figures 3c and 3d show the comparable image and normalized plot for a wafer after post-CMP clean B. It is clear from these figures that clean B was the most effective, reducing the residual copper levels on the oxide areas by two orders of magnitude more than clean A did.
Table II: Calculated copper (Cu) concentrations on oxide in different line-density areas at different scan sizes after post-CMP cleans A and B. Table II shows the calculated copper surface concentrations for the wafers processed using cleans A and B. For each wafer, analyses were carried out at several different scan sizes and for two line spacings—20 and 10 µm. These results indicate that the copper concentration was fairly consistent for sample areas with the same line spacing with no regard to the scan size. However, the copper level was consistently higher on the samples with the 10-µm line spacing because of the closer proximity of the lines.
For the TOF-SIMS analysis of very small features, the focusing of the primary ion beam has to be adjusted to achieve the required spatial resolution. Figure 4 presents two images taken under such conditions and their respective line-scan plots. The spacing between the copper lines was 1 µm. Figures 4a and 4b were obtained from a wafer with high levels of metallic contamination after processing with clean X, while Figures 4c and 4d are for a wafer with lower levels of residual metallic contamination after processing with clean Y. Although it is possible to observe relative differences of copper contamination in these figures and it was concluded that the copper level was approximately 100 times lower on the clean-Y wafer, absolute quantification is not possible. At present the effective limit for obtaining quantitative information is with a line separation of about 3 µm.
TOF-SIMS is also useful for large-area analysis, such as examining wafer features over an extended distance. Figure 5 shows the variation in concentration of several atomic species over a distance of 3 mm on the oxide between two dies. Spectra were acquired at 200-µm intervals using an 80-µm raster. The species shown are lithium, boron, sodium, aluminum, potassium, and copper. Lithium increased systematically from one die to the other and copper was significantly more intense near each of the dies; the other species exhibited more uniform behavior.
Because the features of interest on a wafer may differ widely in size, TOF-SIMS data must be acquired under various conditions. The instrument can be optimized for either high mass resolution (necessary for the highest sensitivity and the most accurate quantification) or high lateral image resolution (necessary for small-area analysis). Figure 6 contains four TOF-SIMS images obtained under different analytical conditions from between copper lines with 100-µm spacing. The image size was 120 µm2 in each case. The differences in image resolution can be seen clearly. Table III presents the calculated surface concentrations of copper determined under the four conditions for the sampling locations in Figure 2. The consistency of the results shown in this table is good, which indicates that TOF-SIMS can be used with confidence under a range of conditions to inspect variously sized features on wafers with copper interconnects.
Table III: Calculated copper concentrations (x1012 atom/cm2) for various sample locations under differing conditions. Conclusion TOF-SIMS is well suited for a wide range of applications in the analysis of patterned wafers, including those with copper interconnects that have undergone post-CMP cleans. Its unique capabilities make it possible to measure concentrations of atomic species, to image features on a wafer, and to analyze whole wafers. This technique can also provide extremely useful specific information about surface contaminant levels that can be used to optimize various wafer processes, thereby maximizing device yields. Acknowledgments The authors would like to thank the process group at Lam CMP for polishing copper-patterned wafers for this study and the TXRF group at Charles Evans & Associates for its work in data acquisition and analysis. References 1. D Edelstein et al., "Full Copper Wiring in a Sub-0.25 µm CMOS ULSI Technology," in Proceedings of the IEEE International Electron Devices Meeting (New York: The Institute of Electrical and Electronics Engineers, 1997), 773–776. 2. D Edelstein, "Advantages of Copper Interconnects," in Proceedings of the VMIC Multilevel Interconnection Conference 12 (Tampa, FL: Multilevel Interconnection Conference, 1995), 301–307. 3. M Bohr, "Interconnect Scaling—The Real Limiter to High Performance ULSI," Solid State Technology 39, no. 9 (1996): 105–111. 4. JM Steigerwald, SP Murarka, and RJ Gutmann, Chemical Mechanical Planarization of Microelectronic Materials (New York: Wiley, 1997), 209–268. 5. J Heidenreich et al., "Copper Dual Damascene Wiring for Sub-0.25 µm CMOS Technology," in Proceedings of the IEEE IITC (New York: The Institute of Electrical and Electronics Engineers, 1998), 151–153. 6. BJ Howard and C Steinbruchel, "Reactive Ion Etching of Copper in SiC14-Based Plasma," Applied Physics Letters 59, no. 8 (1991): 914–916. 7. HF Winters, "The Etching of Cu (100) with C12," Journal of Vacuum Science and Technology A 3, no. 3 (1985): 786–790. 8. P Singer, "The Future of Dielectric CVD: High-Density Plasmas?" Semiconductor International 120, no. 8 (1997): 130–134. 9. J Torres et al., "Study of Cu Contamination during Copper Integration in a Dual Damascene Architecture for Subquarter Micron Technology," in Proceedings of the IEEE IITC (New York: Institute of Electrical and Electronics Engineers, 1998), 232–234. 10. E Zhao et al., "Copper CMP Cleaning Using Brush Scrubbing," in Proceedings of the 3rd CMP Multilevel Interconnection Conference (Tampa, FL: Multilevel Interconnection Conference, 1998), 359–366. 11. D Hymes et al., "The Challenges of the Copper CMP Clean," Semiconductor International 21, no. 6 (1998): 117–122. 12. BW Schueler, "Microscope Imaging by Time-of-Flight Secondary Ion Mass Spectrometry," Microscopy, Microanalysis, and Microstructure 3, no. 2–3 (1992): 119. 13. H Ishida et al., "Surface Analysis of Polyimide Films and Silicon Wafers by TOF-SIMS," in SIMS IX (New York: Wiley, 1994), 508–511. 14. SP Smith, "Measurement of Surface Metal Contamination on Silicon," in SIMS X (New York: Wiley, 1996), 485–488. 15. P Lindley et al., "Whole Wafer Contaminant Distribution by TOF-SIMS Analysis," in SIMS XI (New York: Wiley, 1998), 175–178. 16. PK Chu et al., "Determination of Trace Metallic Impurities on 200-mm Silicon Wafers by Time-of-Flight Secondary-Ion-Mass Spectroscopy," Journal of Vacuum Science and Technology B 15, no. 6, (1997): 1908–1912. Hugh Li, PhD, is a process development engineer at OnTrak Systems (Milpitas, CA). His main responsibilities include post-copper-CMP defect characterization, cleaning process development, and the integration of copper cleaning processes. He received his bachelor's degree in chemistry from the University of Science and Technology of China and his doctorate in physical chemistry from Iowa State University. (Li can be reached at 510/572-3853 or hugh.li@lamrc.com.) Diane J. Hymes, PhD, is director of cleaning process technology at OnTrak Systems and has been a member of the technical team there for more than four years. Before joining OnTrak she worked as an applications research scientist at MEMC Electronic Materials (St. Peters, MO), a silicon wafer manufacturer. She received her MS in 1984 and her PhD in 1987 in materials science and engineering from Brown University (Providence, RI). John de Larios, PhD, is vice president of cleaning technology at OnTrak Systems. The author and coauthor of more than 30 technical papers on the cleaning of semiconductor surfaces, he received his bachelor's degree from the University of California, Berkeley, and his master's from the University of British Columbia, both in metallurgical engineering. He received his doctorate in materials science and engineering from Stanford University (Palo Alto, CA). Ian A. Mowat, PhD, joined Charles Evans & Associates (Redwood City, CA) in 1996 as an analyst in the time-of-flight SIMS group. He has been involved in many types of analyses in the hard disk, semiconductor, and biotechnology industries and has also worked on developing TOF-SIMS capabilities and TOF-SIMS analytical protocols. Before joining CE&A he spent a year at the chemical laboratory of the University of Kent in Canterbury, England. He received his BS in chemistry in 1992 and his PhD in 1996 from the University of Edinburgh, Scotland. (Mowat can be reached at 650/369-4567 or imowat@cea.com.)
Patricia M. Lindley, PhD, is the manager of TOF-SIMS and ESCA/XPS services at Charles Evans & Associates. She has focused on evaluating nonparticulate cleanroom contaminants, such as airborne contamination. In her eight years at CE&A she has also worked on developing TOF-SIMS applications in the semiconductor, hard drive, and polymer industries. She received her BS in chemistry from Grove City College and her PhD from the University of Maryland.
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