Building Copperopolis

Investigating CMP and post-CMP cleaning issues for dual-damascene copper technology

Maria L. Peterson, Robert J. Small, Gordon A. Shaw III, Zhefei J. Chen, and Tuan Truong, EKC Technology

The National Technology Roadmap for Semiconductors developed by the Semiconductor Industry Association projects that there will be seven or eight metal levels on ULSI logic devices by 2006, along with metal insulator dielectric constants of 1.5 to 2.0. Copper is rapidly becoming the metallization material of choice to meet the evolving SIA requirements for metal line density, with IBM, TI, and Motorola taking the lead and initiating major copper programs. Copper's appeal includes its low resistivity (~1.7 µ-cm for bulk copper), which can help improve device performance though greater speed and smaller resistance capacitance time constants; high current density; and good resistance to electromigration. In addition, it can be deposited by a variety of techniques—physical and chemical vapor deposition as well as electroless and electrolytic plating—each with different grain sizes and fill characteristics.

There are still many important issues to be resolved, however, before dual-damascene copper technology can be successfully implemented. Tantalum (Ta)- and tungsten (W)-based diffusion barriers, such as TaN, TaSiN, WN, and WSiN, are needed to prevent copper from diffusing into silicon and gate- and interlevel dielectric materials, where it may become a dopant or form neutral boron-copper complexes in boron-doped silicon, with adverse effects on device performance.^1–4 Effective chemical-mechanical planarization (CMP) of dual-damascene copper structures therefore will require highly efficient removal of both the copper and barrier layers. But achieving this goal is a challenge because the barrier materials are typically more difficult than copper to planarize using standard polishing slurries. In aqueous-based systems it is a tantalum oxide, such as Ta_²O_⁵, that is present rather than bare Ta, and this oxide is quite unreactive to commonly used oxidizers. Effective post-CMP cleaning will also be required, in order to reduce residual metal in field oxide areas and areas between lines to acceptable levels (<10¹³ atoms/cm²).⁵ Copper contamination must also be removed from the back of the wafer. This article addresses these issues by discussing the importance of tailoring CMP slurries to the characteristics of copper and tantalum-based barrier materials and describing the capabilities required in post-CMP cleaning formulations. A two-step CMP process and a cleaning chemistry that may enhance post-CMP processing are also presented.

Tailoring CMP to Copper Processing

A slurry-based wafer-polishing process that works by chemically forming an oxide layer, then mechanically removing that layer, CMP has proven essential to achieving the increasingly stringent planarity requirements that have accompanied the ongoing increases in metal levels and line densities, and the depth-of-focus limits needed to minimize printing defects. The replacement of aluminum metallization with copper dual-damascene structures, however, will necessitate the adoption of new CMP chemistries and processes to maintain such planarization results.

Figure 1: Comparative copper line recess performance for a typical one-step CMP process and a new two-step process.

Copper is comparatively easy to oxidize. Except under very acidic conditions where copper actively dissolves, when exposed to aqueous solutions copper metal forms a cuprous oxide film (with a valence of one) at a pH of ~3, which converts to a cupric oxide film (with a valence of two) with increasing pH.⁶ In neutral to basic pH solutions the oxide film becomes protective, and may be a layered structure of CuO and CuO_².⁷ Unfortunately, this oxidized surface layer is not nearly as protective of the underlying copper structure as the Ta-oxide film oxidized from the diffusion barrier is for its base material.⁸ The result can be up to 1000–2000 Å of dishing into copper lines ranging from <0.5 to >10 µm in size when typical one-step slurries are used (see Figure 1).

A Two-Step Process. Most oxidizers commonly used for CMP have a high static etch rate for copper, which correlates strongly with the tendency of the polishing slurry to cause dishing into the copper lines on a patterned wafer. To overcome such dishing problems, a two-step CMP process was designed in which a chemistry with a high static copper etch rate is followed by a second chemistry with a lower static etch rate. The first slurry chemistry effectively removes bulk copper, but does not contact the device-level structures, so its high etch rate does not affect the line recesses. The data summarized in Table I and Figure 1 show typical removal rates for this two-step approach. Profilometry and atomic force microscopy confirmed that dishing does not increase significantly with line size when this process is used.

Metal Layer	Removal Rate (Å/min)	Static Etch Rate (Å/min)
Step 1:
Cu	>6000	>200
Ta	800	<10
TaN	900	<10
Step 2:
Cu	<1000	<10
Ta	600	<10
TaN	650	<10

Table I: Oxide film removal rates and static etch rates for a two-step CMP process.

A dual-platen CMP system was used to collect much of the data presented here, but polishing only occurred on the primary platen, with a DI-water buff on the secondary platen. The two-step CMP process was designed to be compatible with a single-platen system in that the second-step chemistry does not affect the subsequent wafer to be polished. If a multiplaten tool is used, the timing of the process steps should be balanced to maximize throughput capability. This can be accomplished by splitting polish time among the platens. Endpoint detectors that can detect the transition from the dominance of copper removal to removal of the barrier material are commonly incorporated in the tool to trigger the switch from the first-step chemistry to the second-step chemistry.

Process Characterization. Electrochemical analysis was used to further characterize the polishing behavior of the two-step CMP process. An excellent means of collecting corrosion data because it can be done quickly and requires only small pieces of wafer, the Tafel extrapolation method involves plotting the log of the current produced in an electrochemical reaction of a conducting metal in solution against a voltage applied to that metal by an electrical-potential scanning device.

Figure 2: Typical plot derived by the Tafel extrapolation method.

As the typical plot shown in Figure 2 indicates, there is a clear minimum, which corresponds to the open-circuit potential (OCP). Also called the rest potential, the OCP is the electrical potential the system reaches at equilibrium without any externally applied voltage. It is, therefore, also the corrosion potential (E^_corr) of the metal in the given solution. On either side of the OCP, the plot shows a rapid current rise. The more positive region of this curve is called the anodic wave and corresponds to an oxidation reaction (often at the metal surface); the more negative region is called the cathodic wave and corresponds to a reduction reaction. In both of these regions there is an area of constant slope, which is referred to as the Tafel region. If the E^_corr is extrapolated to this area of constant slope, then the point on the y-axis that corresponds to the point at which they meet is the corrosion current density (I^_cd). Because it is the measure of the amount of current flowing in the system that corresponds to the amount of metal being corroded away in a reduction reaction, the I^_cd is hence a measure of the extent or rate of corrosion. The higher the conducting metal's I^_cd is, the more corrosion is occurring.

Figure 3: Tafel plots for copper, tantalum, and a dual Cu/Ta electrode in the first-step chemistry of the two-step CMP process.

OCP experiments using copper, tantalum, and Cu/Ta electrodes in the first-step chemistry of the two-step CMP process corroborated the assumption that these materials have different reactivities and susceptibilities to corrosion in this slurry. It can be seen on the y-axis in Figure 3 that the I^_cd for tantalum was about six orders of magnitude lower than that for copper, which means the copper was reacting much faster, creating the potential for the dishing of copper lines on a wafer. In contrast, as Figure 4 shows, when the second-step chemistry was used as the test solution, the OCPs of the three electrodes changed. (For each of these Tafel plots, the potentials are plotted versus saturated silver/silver chloride.) Each metal electrode in the second-step chemistry had a similar I^_cd, indicating the reaction rates of the metals was nearly uniform, a situation that minimizes line dishing.

Figure 4: Tafel plots for copper, tantalum, and a dual Cu/Ta electrode in the second-step chemistry of the two-step CMP process.

Electrochemical analysis was also performed in situ—that is, while CMP was occurring—using a device designed at the University of Arizona.⁹ The abrasive used was a colloidal gamma alumina and the polishing pad was a SUBA 4. Tafel data were collected for copper and tantalum in the two chemistries and, as Figure 5 shows, it was found that with the second-step chemistry there was a dramatic increase in the I_^cd values, of three to four orders of magnitude, compared to the test results described above. A plot similar to that in Figure 5 also was obtained when the first-step chemistry was used as the test solution. Thus, while the electrochemical contrast between the effects of the two chemistries was profound when static Tafel data were collected (as seen in Figures 3 and 4), when such data were obtained during CMP the I_^cd values were fairly close, within an order of magnitude of each other at ~10^–5 for tantalum and 10^–4 for copper (Figure 5).

Figure 5: Tafel plots for copper and tantalum in the second-step chemistry of the two-step CMP process.

What these results indicate is that the protective layer that forms on top of the copper and tantalum prevents electron exchange with the second-step chemistry as long as the solution remains static. When CMP is initiated, however, this protective layer is destroyed, allowing the metals to continue oxidizing, as evidenced by the increased I^_cd values. The two-step CMP process, therefore, accomplishes the main goal of CMP: to chemically form an oxide layer, then mechanically remove that layer. In addition, the reaction rate of tantalum is markedly higher with the oxidizer that is the primary component of the second-step chemistry compared to that for standard CMP chemistries, which leads to minimal dishing of copper line structures on the wafer.

Post-CMP Cleaning Issues

Once the polishing process is complete, a post-CMP cleaning process must not only remove residual slurry particles but also trace levels of metal ions, which otherwise could significantly decrease product yield. As mentioned earlier, the metal tolerance level for 16-Mb DRAM devices is ~10¹³ atoms/cm².⁵ This level of cleanliness will continue to be required for the dual-damascene copper process, and recent data indicate that residual copper on field oxides should not be greater than 4 x 10¹³ atoms/cm².¹⁰

Double-sided scrubbers, megasonic wands, and immersion baths are the current equipment options for post-CMP wafer cleaning. These systems are heavy consumers of water—a double-brush scrubber can use more than 200 gal/day in idle mode to maintain the brushes, and its consumption can increase tenfold during actual scrubbing—at a time when the industry needs to reduce the volume of all liquid consumables. The typical fab uses ~1500 gal per 200-mm wafer for front- and back-end processes, yet the SIA roadmap calls for only 500 gal per 200- to 300-mm wafer in the year 2000.¹¹ Because it is estimated that the CMP process will account for 30–40% of the water used in a fab within two to three years,¹² saving water should become a primary focus of efforts to improve cleaning chemistries.

Particle Removal Capability. The residue on a wafer after CMP is highly influenced by the stability of the colloids in the polishing solution. Abrasive particles in solution develop charged surfaces that cause particles to be repelled from one another, but at or near the isoelectric point there is no net charge so particles tend to aggregate. For this reason, most CMP chemistries that use alumina as an abrasive are designed to perform best at a pH less than neutral.

In contrast, most silica-based CMP slurries are stable at high pH. Particles are highly charged in this pH region and do not tend to agglomerate. (Particle surface charges can be modified by various mechanisms, so these generalizations do not apply to every case.) Based on these phenomena, various additives can be incorporated in post-CMP cleaning solutions to enhance residue removal by modifying the charge potential of particles. Additives also may include surfactants, chelators, and other compounds that either interact with the wafer or particle surfaces, or react with metals that are dissolved in solution or adsorbed on the wafer surface. An example of the change in surface charge that can be accomplished through the use of additives in a cleaning solution is given in Figure 6.

Figure 6: Comparative surface charge on alumina particles following exposure to chemistries containing various percentages of a specially developed post-CMP cleaning solution.

Metal Removal Capability. A buffered chelating treatment (BCT) cleaning formulation (EKC4000 PCT, EKC Technology, Hayward, CA) related to the post-CMP cleaning solution that was used to achieve the results shown in Figure 6 has been found capable of removing mobile metal ions such as potassium (K) down to ~10⁸ atoms/cm² from microelectromechanical systems (MEMS) on <100> and <111> oriented silicon substrates. In that study, three test Si <100> wafers were stripped to bare silicon using hydrofluoric acid and etched in concentrated KOH solution to form MEMS structures. Secondary ion mass spectroscopic (SIMS) depth profiles on the KOH-etched surfaces showed that the majority of the resulting potassium contamination was in the top 50 Å of the wafer.

Figure 7: Results of SIMS analysis of Si<100> wafers after the first post-KOH-etch cleaning test. (The SIMS detection limit is 1 x 10⁸ atoms/cm².)

The treated wafers were then cleaned using the BCT cleaning solution, the standard RCA-2 chemistry (1:1:5 HC1:H^₂O^₂:DI water), and DI water only, respectively. A 10-cycle DI-water spin rinse and dry followed the chemical cleaning step. The process time for the various cleans varied, depending on each chemistry's requirements. The BCT cleaning solution was used with a 5-minute immersion at room temperature, while the RCA chemistry was run for 20 minutes at 75°C. As Figure 7 shows, both of these chemistries performed well compared to the DI-water-only process. However, the RCA clean required 4x more process time to achieve only a slightly lower level of surface cleaning.

Figure 8: Results of SIMS analysis of Si<111> wafers after the second post-KOH-etch cleaning test. (The SIMS detection limit is 1 x 10⁸ atoms/cm².)

Because MEMS often requires the use of Si<111> wafers to create the correct angles on the devices being constructed, a second cleaning test was performed using KOH-etched Si<111> surfaces. Three processes were used to clean these wafers: the BCT cleaning solution with rinse-dry cycling as described above, the same solution followed by a reactive ion etch (RIE) step, and a DI-water-only clean. Figure 8 illustrates that the BCT cleaning solution alone clearly outperformed the other two processes. The RIE step, rather than removing the immediate surface layer, actually increased potassium contamination through redeposition of the sputtered ions. It is believed that these results for ion removal from MEMS can be extrapolated to post-CMP cleaning of metal and oxide surfaces. Work corroborating this for both metals and particle removal post-CMP is under way.

Conclusion

The impending transition from aluminum metallization to dual-damascene copper technology presents a number of challenges in the areas of CMP and post-CMP cleaning. Copper's low resistivity allows for increased line density, but its tendency to diffuse into silicon and oxide makes the use of barrier materials such as tantalum a necessity. Novel oxidizer chemistries used in a two-step CMP process have shown excellent potential for equalizing the CMP removal rates of copper and tantalum, thereby minimizing the dishing problems typically associated with copper planarization. The electrochemical techniques described above begin to explain this behavior.

Following CMP, both residual slurry particles and metals must be removed from the wafer surface to prevent device failure. A post-CMP cleaning chemistry that modifies the surface charge potential of slurry particles and incorporates chelators to stabilize residual metals in solution can help achieve both goals. The use of such an effective cleaning chemistry may also help minimize process time and water usage.

References

1. Shacham-Diamond Y, Dedhia A, Hoffstetterand D, and Oldham WG, "Copper Transport in Thermal SiO^₂," Journal of the Electrochemical Society 140(8):2427–2432, 1993.

2. Estreicher SK, "Copper, Lithium, and Hydrogen Passivation of Boron in c-Si," Physical Review, B41(8):5447–5450, 1990.

3. Aboelfotoh MD, and Svenson BG, "Copper Passivation of Boron in Silicon and Boron Reactivation Kinetics," Physical Review, B44(23):12742–12747, 1991.

4. Suni II, "Kinetic Limitations on Metal Dissolution during Aqueous Silicon Wafer Processing," Electrical and Solid Letters, 1(2):94–96, 1998.

5. Toyama N, "Copper Impurity Levels in Silicon," Solid State Electronics 26(1):37–46, 1983.

6. Feng Y, Siow KS, Teo WK, et al., "Corrosion Mechanisms and Products of Copper in Aqueous Solutions at Various pH Values," Corrosion, 53(5):389–398, 1997.

7. Kobayashi K, Shimizu K, Thompson GE, and Wood GE, "Direct Observation of the Mosaic Structure of Thermal Oxide Films on Copper," Revue de Metallurgie, 90(12):
1627–1630, 1993.

8. "Corrosion of Copper and Copper Alloys," in Metals Handbook, 9th ed, Davis J (ed), Materials Park, OH, ASM International, vol 13, pp 610–640, 1987.

9. Kneer EA, Raghunath C, Mathew V, et al., "Electrochemical Measurements during the Chemical Mechanical Polishing of Tungsten Thin Films," Journal of the Electrochemical Society, 144(9):3041—3049, 1997.

10. DeLarios J, "Cu CMP Clean," oral presentation at OnTrak seminar, Semicon West, San Francisco, July 1998.

11. Reddy AJ, Michel J, and Kimerling LC, "In-Situ Bath and Wafer Monitoring," in Proceedings of the Semiannual Meeting on Environmentally Benign Semiconductor Manufacturing, Stanford, CA, NSF/SRC Engineering Research Center, 1998.

12. Corlett G, "CMP Water Reduction and Waste Treatment Overview," in Proceedings of CMP Technology for ULSI Interconnection Symposium, Mountain View, CA, SEMI, pp Q1–Q11, July 1998.

Maria L. Peterson, PhD, has worked for EKC Technology (Hayward, CA) as an R&D chemist since 1996. Her research focuses on developing new copper polishing slurries. She has also worked on new formulations for removing metal contamination and particles from IC substrates and magnetic disks and has formulated metal CMP slurries and post-CMP cleaning chemistries. Peterson has a BA from Carleton College, an MS from UC Berkeley, and a PhD in surface and aqueous geochemistry from Stanford University.

Robert J. Small, PhD, is research director of the R&D group at EKC. He is involved in developing new chemistries for postetch residue removal and postclean treatments. He also works on purification processes for raw materials. Small has a BS from Norwich University, an MS from Texas Tech University, and a PhD from the University of Arizona. He has written 11 CMP and cleaning articles and holds seven patents.

Gordon A. Shaw III works at EKC as an R&D scientist I, focusing on electrochemistry and microimaging. He has a BA in chemistry from Skidmore College.

Zhefei J. Chen, PhD, joined EKC in February 1995 as an R&D chemist. She works on developing and testing new formulations for postetch residue removal, postclean treatments, and post-CMP cleaning as well as new chemistries for magnetic disk cleaning. Chen has a BS in chemical engineering from Zhejiang University (China) and a PhD in physical and polymer chemistry from the State University of New York at Albany.

Tuan Truong is a CMP applications engineer at EKC. He helps develop slurries and optimize removal rates for metal CMP slurries. He has a BS in chemical engineering concentrated in semiconductor processing from San Jose State University.