INDUSTRY NEWS

IMEC looks beyond 45 nm

IMEC has expanded its programs in both sub-45-nm chipmaking technologies and post-CMOS nanotechnology research. The Belgium-based center has signed strategic partnership agreements with 10 leading equipment suppliers—Aixtron, Applied Materials, ASM International, ASML, DNS, FEI, KLA-Tencor, Lam, TEL, and SEZ—to help structure its sub-45-nm work around the most advanced toolsets. As a result, the participating OEMs will have access to early knowledge on future technology applications and will be able to collaborate closely with leading semiconductor manufacturers. The toolmakers join the seven chipmaking companies that have already signed on as core partners for the research programs: Infineon, Intel, Matsushita, Philips, Samsung, STMicro, and TI.

The sub-45-nm CMOS research at IMEC features seven programs: 193-nm immersion and EUV lithography; cleaning and contamination control; substrate modules dealing with the implementation of high-mobility layers and advanced source/drain engineering solutions; gate stack, including high-k dielectrics and metal gates; emerging devices such as FinFETs and FDSOI; germanium-based devices; and advanced interconnect solutions, including ultra-low-k materials and wafer-level packaging. On the immersion lithography front, IMEC's consortium of Industrial Affiliation Program participants has grown to include 30 IC manufacturers (including new members NEC and Sony), equipment companies, resist and related materials suppliers, photomask shops, and software vendors. The partners can do research using the ASML Twinscan XT:1250i immersion tool, which boasts a numerical aperture of 0.85. The system has been installed in IMEC's new 300-mm facility and will be fully operational by January 2005.

IMEC has also launched a new program researching how nanotechnologies can be used to extend advanced CMOS or replace existing semiconductor manufacturing technologies. Semiconducting wires, carbon nanotubes, and spintronics will be investigated, as well as the accompanying metrology and theoretical approaches needed to implement any new methodologies.

Toppan to buy DPI

In a deal that will reportedly create the world's largest photomask manufacturer, Toppan Printing will acquire all the outstanding shares of DuPont Photomasks (DPI) for an equity value of approximately $650 million on a diluted basis. Once the transaction is completed, DPI will become a wholly owned subsidiary of Toppan under the name Toppan Photomasks and will remain based in Round Rock, TX. Akihiro Nagata, a senior managing director of Toppan and head of its electronics division, will become chairman of the new entity, while Marshall Turner, DPI's current chairman and CEO, will retain the chief executive position.

The boards of both companies have approved the agreement, and DPI's largest shareholder, E.I. du Pont de Nemours (which owns 20% of DPI shares), has agreed to vote its portion in favor of the transaction. The deal is subject to the usual regulatory and shareholder approvals and is expected to close in early 2005. Once finalized, the combined entity will operate what it calls the industry's most extensive global mask production network, with sites in China, France, Germany, Japan, Korea, Singapore, Taiwan, and the United States.

SEMI lauds defect pioneers

The 2004 SEMI Awards for North America went to two innovators in the defect inspection arena. George Kren and Lee Galbraith were honored for their contributions during the trade association's foundation fundraiser in late October in San Jose. Kren was recognized for his 25 years of work on the development and marketing of unpatterned-wafer inspection tools, beginning with the first Tencor Surfscan in 1980 and continuing through several generations of the platform, including the current 300-mm models. Part of the founding team of Tencor, he is vice president of business development at KLA-Tencor. After joining Tencor in 1979, Galbraith also helped develop various blank- and patterned-wafer Surfscan systems. His work included the design of calibrated-defect wafers and experiments that measured light scattering from individual particles on polished silicon. Since retiring from Tencor, he has consulted on communication fiber optics, LCDs, and calibration wafers.

IITC calls for papers

The IEEE 2005 International Interconnect Technology Conference (IITC) is seeking technical papers. The eighth annual event, sponsored by the IEEE Electron Devices Society, takes place June 6–8 at the Hyatt Regency in Burlingame, CA. Topics of contributed papers should focus on metallization, CMP, dielectrics, dry processing, process control and modeling, process integration, reliability, and system-on-a-chip. All papers will be reviewed, and those accepted will be designated for either oral or poster presentations. The submission deadline is January 10, 2005, although a very limited number of "late news" papers will be accepted by March 12. For further details, go to www.ieee.org/conference/iitc.