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INDUSTRY NEWS

THE MICRO INTERVIEW

Texas Instruments’
Hans Stork

When you ask Hans Stork a question, he often pauses for several long moments to mull over his answer. Given his position as Texas Instruments’ chief technology officer and man in charge of process development, neither his careful consideration nor the engaging depth of his replies should come as a surprise.

Dutch-born Johannes M.C. “Hans” Stork received a degree in electrical engineering from Delft University of Technology, before coming to the States and earning a PhD from Stanford University. He began his career in 1982 at IBM’s T.J. Watson Research Center, where he played a key role in the company’s successful efforts to develop silicon germanium HBT technology and transfer it to manufacturing. He eventually headed up IBM’s exploratory device and technology programs, where his teams set chip-speed performance records using 100-nm channel-length CMOS devices.

He left Big Blue and joined Hewlett-Packard in 1994. He directed H-P’s ULSI Research Lab from 1995 to 1999; during his tenure at the lab, researchers developed a high-performance 0.18-µm CMOS process with aluminum/low-k interconnect. He then ran the company’s Internet systems and storage lab for two years before moving on to TI in September 2001 as director of silicon technology research.

Since joining TI, Stork has added the CTO and senior vice president titles to his silicon technology research director role. His responsibilities include process integration and unit process/module development activities in the silicon technology area, as well as management oversight for external research and various other program support functions.

I spoke with Stork in Boston after he delivered an ASMC keynote address titled “R&D versus Manufacturing: Turning Ideas into Manufacturable Products.” Our conversation covered a wide range of topics, from his “average” workweek to challenges faced in TI’s 90-nm ramp, from the evolving role of the Kilby Fab to critical issues in the advanced photomask area. We concluded our discussion with his views on where he’d like to see the basic research community focus some of its efforts.—TC

MICRO: What’s your typical workday or workweek like?

STORK: I’d really have to separate them into workweeks that have travel and those that don’t, so let’s assume no travel. I have at least one day where I spend a lot of time in technical discussions, staff meetings, and then technology roadmap meetings. That tends to be my Tuesday. I really have to stretch myself to stay up with the technical content of that.

There are fixed weekly ramp meetings, so there’s a lot of logistical activity and problems of the week, problems of the fab, where things are going right, what’s happening with the yield here, and stuff like that.
Then there are technology reviews where, especially in the programs that are a little bit farther out, what’s our strategy going to be on lithography, or do we have a tool supplier coming in and what’s our message to them?

There’s a third component every week that has to do with people, whether it’s about interviewing new candidates or reviewing the performance of my own team or planning succession or, in the end of the year, compensation planning and that sort of stuff. I find that justified because people do the work here. Investing in the people and developing that and reviewing that is work, that’s time, it’s a judgment of your whole experience, it’s not just [whether] he or she did that project great. It’s what kind of potential do they have, what kind of limits do they have, where do we need to invest, and where do they best fit the job.

Since I have become CTO, I have also found that at least a half to one day a week I spend on trying to understand technology beyond my own space, which is more process development. It’s not all foreign because I’ve managed some other activities over the years, but I like it a lot because it’s usually some new things, and I like learning new things. It’s also very challenging because I have to develop a position and make some judgment on it for whatever that’s needed, without understanding the details on a personal level. I learned that in the job I had before I came to TI, and that’s still a very exciting kind of challenge to have on a daily basis.

There’s something good about not wanting to or not having to go down to the details that you can do yourself. Either base your opinion on the judgment you make on other people because you know them well enough so you can adopt their judgment, or ask the right kind of questions and say ‘my gut feeling says this’ and just go with that. I believe gut feeling is not something that you’re born with, it’s something that comes from having a lot of experiences and having that integrated somewhere in your mind. But that’s a very challenging aspect.

Every week, however well planned it is, it never works out that way. (laughs) There are always things that come up at the last minute, unexpected, and it is a lot about how you deal with disruptions, how you return to what you were doing after making the judgment call, ‘well this is important, you know, I can’t postpone this, I have to change my schedule. I have to throw everybody in disarray because there’s a time for everything and now is that time.’

I say that because I have had to think hard about fab planning in the last couple of weeks. Everybody can make a computer model about how a fab should run. But that’s not how a fab runs, because things don’t go right, they go wrong, whether slowly or suddenly or badly or just a little bit, they just go wrong. It’s how the system responds to the things going wrong, how good it is. I think it’s also reflective of the people that do that. I don’t mind coming across as a person who strongly values the people aspect of the job. That’s really critical.

I have one more reason to say that, which is, my job is mostly in development. By definition, we face new problems that haven’t been faced before. If I don’t have bright people, I won’t get bright answers. You can train everybody to do something that has already been figured out, but to figure out something new is different.

MICRO: You’re in the middle of the 90- nm ramp. Can you give me a general status report on where the ramp is in terms of timelines? Then can you talk about some of the recent challenges you’ve faced or had to overcome in that process?

STORK: Yield ramp is always a very competitive, sensitive issue, so we’ll just say fairly qualitatively, we have stayed within months of our original schedule, which is damn good. That doesn’t mean that we haven’t had challenges. We are doing it both at 200 and 300 mm. The real value for TI, of course, is going to come out in the 300-mm ramp, so the intention and attention and intensity is moving rapidly to 300 mm. One of the differences between 90 nm and 130 nm was that the majority of the issues at 130 nm were in the interconnect, and it has flipped around for us at 90 nm.

MICRO: To the front end of line?

STORK: Front end, yeah. Maybe that’s just because the people in interconnect were so paranoid that they did their job so well and have stayed out of the critical path, but that’s been our experience so far. Because of the very challenging experience at 130 nm, there’s been a lot more planning, a lot more dedication to stay on the ramp curve. So the overall experience, if you look at pure time, is better [at the 90-nm] than at the 130-nm ramp.

MICRO: When are you supposed to get to volume on the 90-nm products?

STORK: Demand is second half of 2004 and into 2005.

MICRO: Will that mostly be going toward the 300-mm, DMOS6 part of it?

STORK: That’s the supply, and very soon to be followed by foundry supply. We manufacture our wireless handset products at 130 nm in eight different fabs around the world. I don’t know what the number [of fabs] is in forecasts for 90 nm, but it’s going to be more than three.

MICRO: We started talking about the differences between the 130-nm transition versus the 90-nm transition, the main one being a flip-flop in focus between back end of line and front end of line. What are some of the FEOL challenges you’ve been dealing with?

STORK: This is difficult because I can’t talk about everything, so I’m only going to give one example that I think I can talk about because it shouldn’t be unexpected to anyone: step-height control on STI is critical. Etch to edge, that is a very, very tight spec, and that’s critical to get the right kind of transistor.

MICRO: How do you see the role of metrology, in process development and during ramps?

STORK: During development, you want to overuse metrology, right? You have to find out what the problems are. Then you want to substitute that with something that is as simple as possible and that’s as sampling-like as possible. For example, scatterometry is a tool that’s extremely helpful if you’re in the sweet spot. If you go beyond a certain zone, the model falls completely apart, so you can no longer trust the information it spits back to you. But of course, knowing that takes some data before you get there. Overall, our use of scatterometry over the generations has increased very rapidly and quite successfully.

MICRO: What kinds of changes or refinements have you done in the Kilby Fab recently?

STORK: The teaming between the development and the manufacturing teams is much more robust. The K-Fab is also a manufacturing fab: it runs product, it runs development. The joint leadership at the top and further down in the trenches, certainly at the first-level manager level, is much better these days. There’s a real engagement. It’s not, ‘Well, you know, we need to support development to do a set of things.’

For example, the yield ramp for 90 nm is a very joint effort. Both organizations have a common objective to do that. Measuring what is most efficient to run a line is one of those things—it’s like metrology, you keep fishing for better ways of how to do that, how to get the fastest learning cycles. We have improved the cycle time to run the learning cycle to go through the fab. But you change one variable and now you have to look at everything else. So I think one of our big surprises—again with 20/20 hindsight, it’s not a big surprise—but one of the early ones staring us in the face was, whoa, look at all this measurement after a cycle, we’re spending way too many hours in measuring devices, how can we speed that up? You have a similar trade- off in defect analysis or something. You want to do as much as possible during the early times to track things, but then as you get closer to manufacturing, you want to minimize that.

We have also improved our prototyping ability tremendously—but this is for the product people, not the process people. If you want to turn out a prototype, we can crank it out very, very fast.

MICRO: So the idea is, it’s acting like a superhot lot at a foundry, where many people pride themselves on their ability to turn around a new design in a matter of days.

STORK: It’s a rapid prototyping concept, and our key customers have wanted it and they have been very pleased. We’ve really made significant improvements, on the order of 10% improvement. It does challenge the organization to a level of intensity that you cannot expect steady-state from the same persons. We usually alternate teams or you build in some other mechanism to take the pressure off at times. You could not have the same people at that kind of intensity all the time…. The tool supposedly can run 24 hours a day, but the people cannot and they never will.

MICRO: How are you seeing the role of your suppliers change?

STORK: (long pause) I’m not the closest to the fire…but clearly when we have these rapid learning cycles, we cannot afford downtime at all. So it does need a lot of prep, and if it needs more prep, then it becomes an inefficiency because other things can’t get done. There’s a lot of work in the process engineering teams with the tool suppliers to get things in shape in time for when we need them. That work is very, very tight. In the planning, and in the phase before that, I see a lot of meetings where people get mixed up between the commercial haggling and what we need them to do from a technology point of view so we both get the information we want most.

Everybody will start those meetings, and they will end them with ‘Wow, I don’t know whether I can afford this,’ or ‘can I do this on my schedule,’ or ‘do I have space in my fab,’ or there are all kinds of excuses, right? So you have changed the problem that you started off with into a posturing kind of thing. I don’t always know how to get through those bottlenecks. It often takes a higher-level kind of agreement or understanding or commitment that we want to make this work.… It’s important for me to separate whether we are trying to establish the feasibility of doing new things or negotiating about which tool we’re going to choose for a manufacturing line and how many numbers and dollars and times and such.

MICRO: More the sales side of the equation.

STORK: That’s right. The intent and the attitude should be different in both cases, but of course, sometimes the same people are involved, so it’s very difficult.

MICRO: What do you see as the critical issues in the photomask area, both currently and going forward to 65 and 45 nm?

STORK: The cost of mask inspection is a real tough one for me. One thing I could bear is the cost of the mask if I knew it were perfect. But I can’t, so I have to inspect it, and there’s a cost and an investment required to inspect masks these days. It doesn’t stop with, ‘oh, I gotta pay fifty or a hundred thousand dollars a plate,’ I also have to bring capital in to thoroughly inspect this stuff. You would think operationally that the job naturally belongs to the mask house, but in order to do that job right, they need a lot of information. So some companies do the stuff in-house, and maybe that’s easier. We do it all externally, so there’s always another barrier, whether it’s a language barrier or an intentional barrier for some other reason.

With lithography, it is not just about the mask or the tool, it’s the cost of patterning a level that in the end is going to make or break its use. Certainly the capital equation has become very, very hard. The manufacturing guy will not worry as much about the mask because the mask is always paid for by the design community. The design community will scream bloody murder about the mask because every time they do a new rev, they have to create a new plate and everything again. Some of them have a difficult time keeping the right perspective on that. I’m sure every company has partitioning on these things, but the end-user doesn’t care who invested what as long as what he pays is less or [the mask] is better.

The costs of both masks and tools have increased at about the same pace. Capital has almost doubled every generation and masks have about doubled every generation. The granularity of the tool is still a much bigger deal: people always wait a lot longer to make the $30 million decision than just a $1 million or $2 million decision, even though they might spend another $2 million three months later. That first decision is easier because the numbers are not that big, but I see no end to it as long as it makes economic sense. Because any alternative like EUV, which would get around some of the resolution enhancement problems, isn’t around the corner. We think we’re going to have all the problems solved, but we will find things in EUV that we haven’t imagined yet, right?

So both in terms of complexity and cost, I don’t think you’re going to shift gears all of a sudden. Now if an imprint technology unexpectedly matures very rapidly and provides an attractive alternative, that could change the balance of the game a lot. But it would have to come in not at a little bit lower price but like a 10x lower price. Even if it’s
incomplete in what it can do, if it’s 10x cheaper, you’ll have a lot of creative energy flowing into that.

MICRO: What kind of work do you have going on with immersion lithography?

STORK: We’re working closely with two of the leading suppliers, mostly to figure out what the right conditions are to get the design-rules set, to get what we need for 45 nm all ironed out. The high-level conclusion is, we don’t think we can do our design-rules set with a numerical aperture (NA) of less than one. That’s a big conclusion because I think all three suppliers—ASML, Nikon, and Canon—all want to come out with a 0.92 or a 0.93 NA.

MICRO: So a very high NA but not quite hyper NA.

STORK: That’s right. We’re saying it can’t be done. Either we’re going to back off on our design rules, which means we can’t shrink, at least we don’t know yet how to shrink things by 2¥ or something close to that. Which means that the cost reduction is going to change, which then means either we need to do it for much less money because otherwise the customer won’t want to pay for it. But that’s usually not the answer, right? I mean, nobody says you can get 0.93 NA for much less money than you can get the other one! (laughs).

I’m not saying it’s not possible to do something less aggressive. I’m saying that if that’s the choice, it has to be done with much less cost and/or in a shorter amount of time, which usually is very difficult. You’re already at sort of the limit, [since] two years to develop another node is something logistically that people just can’t get their arms around.

MICRO: Is 193i on your roadmap?

STORK: Absolutely.

MICRO: At what insertion point?

STORK: At 45 nm. It’s not going to be ready for 65. And then again, there may be some struggle to see what exactly will be ready at the 45-nm time frame.

MICRO: Let’s talk about the research community now. Do you see some gaps, both in terms of the basic research, the broad-brush research, and the more consortia or focused research, where more emphasis needs to be put? Weak links, if you will?

STORK: I would like to see people look at intrinsic reliability as early as possible. What I mean is just the time behavior of properties under stress conditions, if you want to accelerate it, otherwise you don’t learn anything. So there’s too much in the word ‘reliability’ that people connote with random defects and poor implementation and stuff like that. But I think it’s changing.

Let’s take the world of dielectrics. We cannot just say we’re going to wait until we need to understand when breakdown is, right? Because when we bias these things a tenth of a volt more, we get more performance, but it will degrade over time faster. We need to understand what degrades and how it degrades over time. We need models for that, since people are going to build the thing anyway. It would be good to say it will only last five years instead of 10 years. No, no, no. How will it perform during those five years? Because maybe I only want it to perform four years or seven years, you know, and how do we do that trade-off? How fast can it run if I squeeze this or that?

Again, these are extrinsic and intrinsic issues. The extrinsic issues will be solved as we ramp yield and get into manufacturing, but what about the intrinsic behaviors, and things are intrinsic in many cases. You cannot assume that there’s not going to be hydrogen around, right? There is always hydrogen around. If you put things under temperature like we have seen with copper void migration, if you have a certain set of concentrations, it will move and this is that kind of behavior. You can work on the source of the problem, but the description of that space needs to start very early on. I think students at the university can do that. They don’t need a hundred thousand different samples. They can put everything they build into it if it looks like, ‘hey, I’m having these objectives, and I’ve met those objectives more or less.’ Put it under stress, put it under temperature, put it under other things. Hopefully you still can understand what happens when it moves, and it will certainly deepen the knowledge of these things. It may have been a nice-to-have in the past, but I think it’s a must-have now.

I had always thought that we needed to design products with graceful degradation because certain components would be broken or something like that. Well, I’ve been adjusting my thinking for the past year. Now I think we will have to design with graceful degradation because our components are actually getting old. We will start designing things that will deteriorate predictably over time as they get older.

We have been too digital. We either spike it and it works or it breaks, that sort of thing. Everything mechanical we do in the world needs to be maintained and so forth, but we expect it to deteriorate over time. Everything biological deteriorates over time. In electronics, we’re going to go into designing things, understanding things, building things that will continue to work but at a lesser performance or at lesser spec than when it was first working. As such, we will be more efficient and effective because we will use more of the resource, to a fuller extent.


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