SCOTT HECTOR
(mask strategy program manager, lithography division; International Sematech): Lithography at dimensions commensurate with those described in the International Technology Roadmap for Semiconductors at technology nodes with a half-pitch of ≤65 nm will require increasingly complex masks. The extension of optical projection lithography through immersion is placing greater demands on the mask to compensate for diffraction and limited depth of focus (DOF) through strong resolution enhancement techniques (RETs), such as embedded and alternating phase-shift masks (PSMs) and complex model-based optical proximity correction (OPC).

Many new or upgraded tools are required to pattern, verify dimensions and placement, inspect for defects, and to review and repair defects on these masks. Beyond the significant technical challenges, suppliers of mask fabrication equipment face the challenge of being profitable in the small market for mask equipment, while encountering significant R&D expenses to bring new generations of equipment to market. Affordability of the required R&D is probably the greatest problem for suppliers of pattern generators, repair tools, cleaning tools, and actinic defect-review tools.

Mask-cleaning capability to remove sub-100-nm particles without damaging the mask or leaving residues is an urgent need. Residues left on the mask from cleaning have been a source of defect generation during use of masks for both 193- and 248-nm lithography. Novel cleaning techniques will be needed to augment traditional wet chemical and hydrodynamic approaches.

The throughput of pattern generators at the required resolution, and with the required critical dimension (CD) control, is another significant challenge. Current electron-beam writers, operating at 50-kV accelerating voltage, have high resolution; however, the extension of vector-shaped beam technology to write the rapidly increasing number of shapes may require significantly longer writing times with each generation. Optical pattern generators, which have higher throughput than E-beam tools, need increased resolution. Mask-writing time is one of the most significant drivers of mask cost, and mask writing has a large impact on CD control.

The number of mask CD measurements required per mask is increasing rapidly, so achieving acceptable throughput at increasing resolution is a significant challenge. Quantifying complex pattern fidelity is also increasingly in demand. The capability to accurately repair binary and phase-shift masks with subresolution assist features, such as serifs or scattering bars, is also a significant challenge. Several approaches to repair—including using focused ion beams, electron beams, ultrashort laser pulses, and atomic force microscopy (AFM)­based nanomachining—are being developed. Each technique has strengths and weaknesses, and mask shops are finding that a combination of techniques and several repair tools is becoming necessary to best repair all of the types of defects found.

We must find a way to move from "the elusive mask infrastructure" to "the enabled mask infrastructure."—Chris Progler

JOSEPH F. GORDON (R&D fellow, DuPont Photomasks): As photolithography moves to 193-nm exposure sources, the paradigm of unlimited mask life is changing. The increased photon energy, coupled with the higher optical absorption of most materials at this shorter wavelength, leads to chemical breakdown of materials in ambient air.

In addition, outgassed contaminants from the pellicle-mask assembly and storage components have been suspected to contribute compounds that break down during repeated exposures at 193 nm. These contaminants then react to form new materials that precipitate onto the mask. This phenomenon creates the appearance of haze on the surface of the photomask and potentially impacts the quality of the image transfer over time.

Significant progress has been made to better understand the science of this issue. But the result is that greater attention is being paid to the quality of photomasks throughout their useful lives. One industry approach to increase the longevity of these advanced masks is to focus on reducing residuals left over from the photomask manufacturing process. Improved cleaning methods and other techniques have emerged in advanced photomask manufacturing facilities as a way to significantly reduce, or eliminate altogether, potential contaminants from the production process. An added responsibility of photomask manufacturers is to employ ever-stricter change control in their entire process flow as a way to ensure that changes do not adversely affect long-term photomask reliability.

As a way to help understand how process changes may affect long-term reliability, our company has implemented a unique test chamber that does rigorous testing of the mask package supplied to the customer to ensure compatibility at the customer's exposure wavelength. Through these lab tests, processes and materials of construction changes can be screened to ensure that changes do not adversely impact long-term reliability once the photomasks are put into use in semiconductor fabs. In the future, additional measures of routine recertification of photomasks in use will be required to ensure that they remain haze-free.

J. TRACY WEED (director, product marketing, Synopsys): A significant issue facing leading-edge fab engineers is how to handle increasing data-file size. This was not always an issue, even for the early subwavelength technology nodes, but must now be considered as part of the overall design to silicon flow. Engineers focused on 250-nm designs are able to keep data file sizes to <10 Gb. The existing infrastructure (file transfer rates and reliability, storage, and processing capability) is able to handle these data quite easily. In addition, 16-Gb files generated by the move to 180-nm technology node caused few additional problems.

The real "pain" started when 130-nm designs began employing significant levels of RETS, such as OPC, subresolution assist features (SRAFs), and PSMs. These added to the overall complexity of the flow and caused data file sizes to grow to more than 50 Gb. As a result, file transfer times increased, the reliability of the file transfer was reduced, increased storage requirements forced additional IT resources, and network bandwidths were strained.

To make a troublesome situation even worse, 90- and 65-nm technology nodes are expected to use OPC on more than 60% of all levels, some 50% more than what is used for the 130-nm technology node. This contributes to the fact that the 65-nm-node file size is expected to grow to more than 700 Gb (0.7 Tb!). Fortunately, techniques and flows have been recently developed that can alleviate or reduce the problems associated with increased file sizes: some
techniques reduce the growth in file size, while others allow even large files to be handled with minimal impact to the infrastructure.

Reducing the file size can be effectively done within the OPC flow. A dramatic increase in file size (500% increase in the number of vertices) can occur when this RET is applied indiscriminately. Application of "design-driven" OPC, a correction that is consistent with the designers' intent, can reduce the number of vertices added during correction to as few as 15%. Furthermore, since design-driven OPC can manipulate edges, the number of polygons can be reduced, which in turn reduces the number of shot counts required during mask writing. This factor improves throughput and overall quality of results.

Techniques that effectively address large file sizes include compression, distributed processing, pipelining, and OASIS (Open Artwork System Interchange Standard, SEMI P39). Newer compression algorithms (gdzip) that are optimized for the specific task at hand (such as design file compression) have resulted in a tenfold increase in compression over generic compression algorithms (gzip). A truly scalable distributed processing operation can bring thousands of microprocessors to bear on operations, such as mask data prep (MDP) and OPC, providing dramatic improvement in turnaround time and throughput. Pipelining is a technique in which OPC and MDP are integrated and performed in parallel, providing a significant throughput benefit. Lastly, OASIS is an improved GDSII format able to address large file sizes. Although OASIS is better at addressing large files than GDSII, additional compression will be required to address the larger files generated today and in the future.

CHRIS PROGLER (chief technology officer, Photronics): Photomask technology has become an enabling partner in the delivery of leading-edge ICs. Looking ahead at 193-nm lithography extensions through the 45-nm node, masks may be the highest-leverage technology element in the entire lithography delivery model. It certainly appears that mask manufacturers, both captive and merchant, will finally have their day in the sun from a critical technology perspective.

Moreover, as manufacturability bridges continue to go up between lithography delivery and electronic design disciplines, the mask stands at a key inflection point between these domains. The photomask is the first hardware realization of the design flow, making it an ideal juncture for RET verification, cost and performance trade-offs, and layout modification for manufacturability. As mask technology enters this new era of importance, it is fair to ask whether the industry itself is ready to take on this responsibility. To answer this question, one must critically examine the emerging infrastructure supporting mask fabrication.

We must start at the heart of mask manufacturing: equipment used in pattern generation. Consider a comparison between lithography exposure systems (i.e., scanners) creating content in a wafer fab and pattern generation systems creating content in a "mask fab." The scanner makes a living by delivering lithographic bits of information at progressively lower integrated costs for each node. Advances in working resolution coupled with higher throughput adequately offset the increasing cost of the equipment. Mask-pattern generators fell off the productivity-capability curve some time ago, along with many other key tools in the maskmaking flow. Moreover, to support the pattern generation step, productive integrated process clusters should have landed in the mask facility at the same time that chemically amplified resists were introduced.

Defectivity is the largest yield-loss mechanism in a mask fab. Yet while successive generations of inspection systems certainly find more defects, they do not offer a commensurate improvement in our ability to comprehend defects. This defect detection-comprehension gap is a significant yield-loss component. This gap appears addressable with proper focus; however, other key mask-process steps such as repair and cleaning lack the development infrastructure that can drive the needed step-function improvements in base capability.

The standardized methods and models needed to drive advanced process control within the maskmaking environment are sorely lacking. Where else can we probe and challenge the mask infrastructure: Imaging materials for masks? Productive topography measurement? Surface contamination understanding? It's not about whether a mask company can afford the best tools and materials but more about whether a truly enabling mask infrastructure can be acquired at any cost.

The reasons for gaps in overall mask infrastructure are frequently debated: the funding model is broken, consortia projects are weighted too heavily toward a small number of captive mask facilities, exposure system makers get a disproportionate amount of chipmaker funding, maskmakers themselves don't champion the value proposition offered in an enabling infrastructure, and so on. Whatever the reasons, we must find a way to move from "the elusive mask infrastructure" to "the enabled mask infrastructure."