New photomask facility in Dresden combines R&D, pilot, and production lines

In mid-April, MICRO toured the state-of-the-art DuPont Photomasks (DPI) maskmaking facility in Dresden, Germany. Situated in the midst of the Saxon countryside, just a stone's throw away from the city's famous Frauenkirche and Semper Oper, the site combines two facilities under one roof: the Advanced Mask Technology Center (AMTC), a joint venture between DPI and chipmakers Infineon Technologies and Advanced Micro Devices (AMD), and DPI's own production plant. A significant addition to the Silicon Saxony high-tech landscape, the facility is located within eyeshot of AMD's Fab30/Fab36 complex and Infineon's DD200/DD300 fabs.

MASK MASTERS: DPI's new Dresden facility features an advanced tool suite, including the coating systems shown here. PHOTO COURTESY OF DUPONT PHOTOMASKS

The Dresden mask house is on the leading edge of the company's maskmaking operations, noted Franz Leibl, general manager and site manager in Dresden. Its products are marketed worldwide. Groundbreaking began in 2002, followed in 2003 by the company's move to the new facility and the start of production. In early May, commercial production began. In addition to the Dresden plant, DPI maintains European manufacturing and nonmanufacturing operations in Hamburg, Germany, as well as in Rousset and Corbeil- Essonnes, France.

Because chips are only as good as the masks used to make them, photomask fabrication is highly exacting. The required tolerances in the final mask product are less than 20 nm. Therefore, building vibrations that can affect mask precision must be prevented.

"The facility's outer shell rests on 360 pylons embedded in the area's natural bedrock," commented Leibl. For enhanced stability, the building's guts are isolated from the outer shell. To cushion the manufacturing wing against movement caused by in- and outbound jets at nearby Dresden airport, engineers designed a delicate metal-mesh structure at the rear of the building facing the runway to absorb shock waves. Other environmental influences can also affect the maskmaking process. Even changes in the earth's magnetic field caused by the opening and closing of a metal door or the use of a cell phone in the vicinity of a mask writer must be avoided.

Overall, the site has 34,500 sq ft of cleanroom space, 15,000 sq ft of which are already in use. The existing Class 100 cleanroom, with minienvironments rated to Class 1, overlooks an immense empty space designed to accommodate future expansions. The area's huge raised-access floor, located well above the ground floor, is, said Leibl, a kind of foundation within a foundation—another engineering measure for reducing vibrations.

AMTC, which officially opened its doors last October, will receive roughly 500 million euros from the three manufacturers through 2007 and 80 million euros from the German federal research ministry in conjunction with 20 firms interested in developing mask and alternative photolithography technologies. Its purpose is to conduct R&D and run pilot-line operations, with the goal of becoming a leading center for chrome-on-glass, phase-shift, optical proximity correction, and extreme ultraviolet masks.

Infineon's participation in the joint venture was predicated on the company's move in 2002 to shut down its internal maskmaking business in Munich and transfer it to DPI. At that time, DPI signed a 10-year agreement with Infineon to supply the chipmaker with masks and acquired the chipmaker's advanced reticle-production tools, including electron-beam and laser-writing equipment capable of making 90-nm masks.

While the DPI half of the Dresden operation will manufacture masks for the 90-nm node, AMTC will concentrate on developing masks for future needs. AMTC runs a complete line making everything from pellicles to masks. DPI and AMTC each use a range of tools from different OEMs without duplicating each other's efforts entirely. Both, however, use standardized quality and software systems that are integrated into DPI's worldwide operations.

Leibl explained what that division of labor means for the participating companies. "By collaborating with chipmakers, the development process can be optimized. Decisions can be made about what types of R&D to conduct. The companies can tread the same path."

There is virtually no physical distinction between AMTC's R&D/pilot-line efforts and DPI's production activities—they share different sides of the same cleanroom. So what's in it for the maskmaker? "When the labels change, the technology remains," answered Leibl. In other words, what AMTC starts, DPI finishes—the pilot line moves to the other side of the room and becomes a production line. The tight collaboration among the partners, together with their shared R&D assets, will ensure that AMTC's R&D accomplishments will translate rapidly into commercially viable mask production for DPI. Eventually, the maskmaker plans to acquire the tools that AMTC uses to perform R&D.

All three partners contribute personnel to AMTC: some 25 people come from Infineon, 5 from AMD, and 10 from DPI. The center also employs about 50 outside people. While the partners assign personnel to AMTC, salaries are paid by the joint venture. Operating costs are split. While assets are owned or, in some cases, leased by AMTC, the individual partners have certain claims to how AMTC spends its time and assets.

"A chunk of time goes to AMTC for R&D work, and a chunk of time goes to the three partners," explained Tom Blake, DPI's vp of marketing. "DPI can go in there and use assets to make prototype masks for customers other than the partners. AMTC can also contract to use DPI's tools." That's the way to best leverage assets, he added.

The region's impressive technical and scientific resources, in addition to generous incentives and subsidies from the government side, have enabled DPI and its partners to launch what is touted as the most advanced facility of its kind. Given the increasing technological demand for masks used to manufacture chips with nanometer-scale design rules, the facility has its work cut out for it.

"Photomask manufacturing processes have become a lot more like wafer fab processing," commented Blake. "Today, with advanced mask technologies such as phase-shift or the more-advanced binary masks, we've shifted from the use of chemical etch to dry etch, which wafer fabs did years ago." That transition, he noted, had to do with the increasing demand for preciseness and uniformity and happened at the 0.18-µm node. "Now it's all dry etch. You can't dunk, strip, and ship anymore."

However, advanced technologies translate into rising mask costs, a bane of chipmakers. One cost contributor is multilayer film processing. "Multiple iterations, or multiple process loops, are now necessary in maskmaking," Blake noted. "That was not the case before. And photoresist coating capabilities are now necessary."

The biggest piece of the price equation, however, has to do with tool deployment and costs. Higher equipment costs and depreciation, greater chip complexity, and more time spent in writing and patterning masks have upped mask prices. "A single manufacturing line for producing one 90-nm critical layer is on the order of $50 million to $60 million," Blake stressed. "Write times per critical layer using an E-beam tool can range from 8 to 24 hours. And 60 to 70% yields, as in wafer manufacturing, are not good enough. It's either all good or all bad."

The Dresden facility is clean—very clean. "We spend lots of time on contamination control," remarked Blake. "A single particle can ruin an entire mask. One particle and we may have to throw the mask away." Leibl explained that "there are worlds between defect levels in the mask and wafer areas. Not even 100 masks are produced each week, but each single product is inspected. Every mask is measured." Since a mask house does not employ steppers, the effects of defects must be simulated. The question for a defect engineer in a mask house is, "Will a defect be transmitted to the wafer or not?"

"The industry is working on defect classification," noted Blake. "We have to understand design intent so that we can make more-informed decisions about what really is a defect. If we know what parts of a chip are on a critical path when a design comes to us, we can more intelligently disposition defects to a point where we find those that won't print, and we won't repair them. A defect may print but not be in a critical path, so we can decide to send the mask on in." Limiting mask-repair processes is one way to keep costs down.

Leibl emphasized that AMTC is an antidote to high mask prices. "How well the mask and chip manufacturers work together—that's the way to keep costs within bounds."—BM