MICRO:World Beat

TEL and Nikon have accelerated their collaboration on the development of a liquid immersion exposure technology. A new agreement signed by the two equipment manufacturers sets the end of 2003 as a target date for production-worthy immersion technology. TEL and Nikon have been working together since 2001 to develop a lithographic exposure system compatible with liquid immersion exposure. The toolmakers hope to combine TEL's expertise in resist coater/developer technology and Nikon's capabilities in exposure tools. The companies also expect to tap the talents of photoresist suppliers.

Silterra Malaysia plans to expand its operations throughout Asia and Europe. The foundry says it will upgrade its sales and marketing presence in Taiwan, Southeast Asia, Europe, South Korea, and Japan. Satellite offices in Asia and Europe will each have a senior executive overseeing a team comprising sales, process, and design experts, Silterra says. The foundry's chips are used in DVD players, wireless devices, disk drives, and other high-tech products.

TSMC has adopted process integration technology from PDF Solutions in order to expedite the foundry's 90-nm process ramp. The world's largest foundry will work with the San Jose– based vendor on the 90-nm yield learning infrastructure project. The companies hope to complete the project in the fourth quarter of 2003. Initial work on the project is being done at TSMC's Fab 12.

SMIC, China's pure-play foundry, has licensed an IP platform from a California-based company that promises to lower both silicon costs and reduce the risk of failure. The foundry will use Virage Logic's Technology-Optimized Platform and FirstPass-Silicon Characterization program. The platform comprises embedded memories, logic library cells, and standard I/O cells tailored to fit SMIC's 180-nm design rules, according to the vendor. The Shanghai-based foundry processes 200-mm wafers in volume at geometries ≤180 nm.

IBM has opened a center in Haifa, Israel, that will provide design services for customers needing advanced ICs. The center will focus on ASIC logic design, custom design of digital and analog circuits, and array design. Additional services include physical design and verification. As part of the expansion plan, IBM will add 40 engineers to its engineers and technology services unit, which employs 1000 around the world. The unit has offices in the United States, Germany, Japan, and India.

IMEC, Soitec, and Umicore have signed an agreement to jointly tackle scaling challenges posed by sub-45-nm geometries in the International Technology Roadmap for Semiconductors (ITRS). The goal of the pact is to enable fabrication of germanium-on-insulator (GeOI) substrates and develop chips on the substrates.

IMEC, the Belgium-based research consortium, will develop a high-k deposition method for GeOI wafers, while Umicore will use its expertise in materials to produce 200- and 300-mm crystalline germanium wafers. Soitec, the leading manufacturer of silicon-on-insulator (SOI) wafers, will use its SmartCut process to transfer the germanium layer from substrates to make the GeOI wafers.

"To solve the channel mobility and gate leakage current problems present in scaled silicon devices, we believe that alternative concepts such as the combination of high-k dielectrics with germanium need to be examined," says Gilbert Declerck, IMEC's president and CEO. IMEC plans to transfer the results of the collaboration into its Industrial Affiliation Program for germanium-based technology in order to make high-performance CMOS transistors.

Infineon Technologies is replacing 19 service centers with three centralized offices in Ireland, Sweden, and Germany. The new centers will be in Dublin, Kista, and Infineon's headquarters site in Munich, respectively. The Dublin center will employ 30 persons. Infineon, which received a grant from the Irish Development Agency, already has a sales and support office and a software company in Dublin.

Micronic Laser of Taby, Sweden, and ASML Holding will focus on developing optical maskless lithography technology under the terms of a new joint venture agreement. Micronic will combine its mask pattern generator technology with ASML's expertise in lithography systems. Because optical maskless lithography is compatible with conventional volume lithography, it permits a smooth integration with existing chipmaking processes, the companies point out.

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