MICRO: Chip Industry

At this point in the development of production-worthy low-k dielectric materials, it's difficult to determine which is more prevalent: the breakthrough announcements or the public misgivings.

Around the same time that Novellus Systems hints at a major advancement, the chief technical officer of the process equipment manufacturer complains during a Semicon West conference that IC designers won't see the advantages touted by the materials' champions. Wilbert van den Hoek says that integrating low-k materials has proved more daunting and less beneficial at the lower dielectric constants than expected. The hard work "isn't buying us anything," he warns. In fact, low-k film has been an abject failure at the 130-nm node, van den Hoek insists.

However, a few weeks before his pronouncement, van den Hoek, who's also the vendor's executive vice president of integration and advanced development, said that Novellus, a deposition specialist, is working on a "non-PECVD" method that uses a film with structured pores that delivers a dielectric constant below 2. The chemical process is certainly not a spin-on method, whose proponents assert that the constants hovering near 2 are more likely with their technology than with a CVD-based version. Expect more news from the company's R&D department next year, Novellus winks.

Meanwhile, one leading industry analyst recently denigrated backers of spin-on dielectric (SOD) films as "living in a dream world" and claimed SOD's wafer-track deposition method as too costly and exotic. A primary technical worry for both CVD and SOD films is that the porosity will cause metal to diffuse into the insulators. For their part, SOD backers believe CVD sacrifices the required dielectric constants for ruggedness, thus foregoing the desired "extendability" to lower constants.

In June, Dow Chemical, a leading SOD film provider, announced its own breakthrough for the supplier's signature SiLK resin. The company said it has reduced the SOD material's average pore diameter by more than 40% and the pore size distribution by 65%. The announcement came at the fifth annual meeting of the SiLK Users Group seminar and SiLKnet Alliance Data Network Showcase, which was held at the International Interconnect Technology Conference in Burlingame, CA.

Formed in 2001, the SiLKnet Alliance is a Dow-sponsored group of 25 companies that focuses on the integration of SiLK materials in copper interconnect processes. Dow Chemical manufactures the SiLK spin-on resins. The materials have a k value of 2.6 for copper damascene and aluminum/tungsten processing, according to the supplier. The new resin has a k value of 2.2 and has passed a "CMP torture test" by Cabot Microelectronics, a member of the alliance.

"Pore size and distribution control were really the last major hurdles we needed to get over to make the integration of porous dielectrics achievable," asserts Mark McClear, global business director of the semiconductor fab materials group for Dow's advanced electronic materials unit.

The daunting nature of the integration challenge hasn't stopped others from trying to enter the market that includes other heavy hitters such as Applied Materials. Silecs, a start-up based in Finland, announced in July that it has developed an SOD material with virtually no pores. The "nonporous" film, which has a dielectric constant that ranges down to 2.2, thus may have the process robustness that has industry experts sounding like so many coffee gourmets. (See accompanying news story, "Finnish optoelectronics firm eyes breakthrough with spin-on material.")

These issues—and several others—were discussed at a Semicon West forum that highlighted the good news–bad news dichotomy at the heart of the development of this replacement for silicon dioxide film. Hosted by EKC/ DuPont, the event focused on the integration of low-k materials and copper in advanced processes. It drew an overflow crowd to an overheated conference room to hear the low-k latest. The six-member panel represented a cross section of the industry and featured three representatives from semiconductor manufacturers, one equipment vendor executive, and two materials supplier reps.

Moderator Ken Monnig, International Sematech's associate director of interconnect, fed questions to the panelists, who answered in turn. A few themes and areas of agreement emerged: low-k materials are materials with a k value of 3 or lower, costs must be competitive, and greater porosity creates greater problems.

"The challenge of low-k [integration] is equal to that of copper," noted Mike Mills, Dow Chemical's director of emerging technology, in his opening comments. Mills placed a high importance on the so-called extendability of the materials.

"There's a great debate between spin-on and CVD and inorganic and polys," said Mills. He emphasized the $10-million cost difference in toolsets and suggested that customers may pick "a strategy of mix and match." Panelist Mansour Moinpour, Intel's engineering manager for fab materials operations, told the packed audience that low-k "is ready for manufacturing this year at the 90-nm technology node." He later noted that he'd like to see a demonstration of the manufacturability of the supply chain at that node. He also emphasized that the industry needs to examine overall cost of ownership for equipment.

Moinpour's chipmaking counterparts on the panel stressed the obvious importance of yields. This none-too-small matter surfaced as recent murmurings in the technical press about IBM's alleged problems with SiLK SOD materials. "The dielectric constant is not the only target," he pointed out. "It's just one component of the overall picture."

Jim Doran, AMD's vice president for the chipmaker's memory group, wants a "competitive product at a competitive cost. The cost had better be there, and be sure to put a technology in place that yields." Elaborating on that thought during the Q&A session, he stressed, "We need three things: yield, stability, and metrology. And what do we need most in life: yields, yields, and yields.... Those three elements will determine whether this is going to go faster or slower."

Hans Stork, a senior vice president in TI's silicon technology division, said for next-generation devices an improvement of at least 20% is necessary—"one-half because of interconnect and one-half because of low-k. I need a lot of justification to change my toolset."

He added that materials interaction, material cleaning, and packaging also are important. "These are what make them succeed or not succeed. More porosity creates problems. Unless we get a real breakthrough in understanding, we're going to be slowly bringing in low-k material at the 90-nm node and below." Stork pushed for open cooperation with vendors.

Panelist Michael Mocella, a senior technical consultant for DuPont, agreed but added there's still work to be done on collaboration. "There is some transition in thinking, but the mind-set needs to be further developed."

Panelist Leo Archer suggested that greater cooperation from customers would lead to cost benefits for all. "The biggest concern in the United States is cost of ownership," said the senior technologist for SEZ Group, a leading supplier of single-wafer surface-cleaning equipment. "Yield on every die is the key to keeping fabs running at peak efficiency in the United States.... There has to be more of a willingness on behalf of integrated device manufacturers to work with materials suppliers to keep costs down." During his opening remarks, Archer said the company is "already seeing more cooperation among many companies."

Monnig, the moderator, asked the panelists when they might be able to "purchase a part that uses less than 3 k?" Replied a deadpan Mills of Dow Chemical: "In the beginning of 2004 at Fry's [Electronics]." Archer and Stork agreed.

Despite the misgivings about its effectiveness, work on overcoming the drawbacks continues because it has to. So, too, do the debate and the forecasts. In his presentation at the annual Gartner/Dataquest forecasting conference, Klaus-Dieter Rinnen, managing vice president of manufacturing and design, emerging technologies and semiconductors, predicted strong worldwide growth for low-k equipment revenues in the coming years.

Revenues that hover somewhere in the $100 million range in 2003 are expected to surpass the $250 million mark next year as they soar way past $500 million when the 65-nm technology node heaves into view in 2005–2006, Rinnen says. CVD systems will take the overwhelming amount of market share until 2007, when SOD tools "begin to gain traction."

From the materials standpoint at least one other market research firm also sees growth in the spin-on side. In a report on global equipment and materials, The Information Network of New Tripoli, PA, predicts that SOD materials will show the largest growth of all materials between 2002 and 2005. Revenues of SOD films will grow at a compounded annual rate of approximately 30% by 2005. In particular, spin-on with k values <3 will show a CAGR of 80%, the firm says.

Skeptics remain skeptical, of course, particularly when they work for the competition. "Spin-on continues to push out," insists David Smith, vice president and general manager for Novellus' PECVD business. "Watch the feet. Listen to the words, but watch the feet."

Or, more likely, the bottom line.

Chip industry looks for solutions to slow start for low-k materials