Kishore Potti and Manuel Aybar, Texas Instruments

Case studies involving cleaning cycle times, sputter tool throughput, and deposition thicknesses show that a simulation technique can estimate the effects of process parameters on tool productivity.

The ability of engineers to know how much manufacturing capacity is available in the fab is very important in the semiconductor industry. Because capital expenses are high, companies want to exploit their manufacturing capital to the fullest in order to maximize their return on investment. Therefore, tool simulation models that can analyze metrics such as cycle time and throughput at the tool level are necessary.

ToolSim (formerly Clustersim) from Brooks-PRI Automation (Chelmsford, MA) is one such simulation technique. Based on AutoMod, the simulation tool was developed specifically for use in the semiconductor industry. By customizing the tool models included in the ToolSim software package, various processing scenarios were simulated in a series of case studies performed at Texas Instruments' DMOS 5 wafer fab (Dallas). The high-volume/high-mix fab manufactures analog/DSP products.

Several benefits were derived from the use of the simulation package. The first was its ability to quickly assess tool throughput when the process engineering department attempted to modify a process step—for example, a clean cycle in a recipe for a deposition step. The second was the package's predictive accuracy, which results from feeding data into the simulation model directly from the tool interface (recipes, tool logs, etc.). At Texas Instruments, the output of these models usually serves as a medium for discussion in cross-functional groups known as quality improvement teams, which consist of representatives from diverse functional backgrounds such as process engineering, equipment engineering, industrial engineering, and manufacturing oversight.

Simulation Tool Inputs and Outputs

The simulation tool used to perform the case studies discussed here contains several input screens that allow the user to enter data in a user-friendly interface similar to Excel. The parts screen (shown in Table I) allows the user to define the name of the part (or device/product name) under investigation and links the part to a route defined in the route table. The parts screen also can be used to assign colors to carriers so that wafers can be visualized easily when the simulation tool is running.

Part	Route	Carrier Color
Product 1	Route 1	Cyan
Product 2	Route 2	Red

Table I: The simulation tool's parts screen.

The order screen (presented in Table II) captures the lot number (carrier ID), part name, number of wafers per carrier, and wafer arrival frequency from the previous log point, or series of steps. (In the studies described here, the arrival frequency of wafers into the tool was determined from the log-outs, or wafer moves, from the previous log points. Processable material was always available in front of the tool.) There is no limit to the number of definable products.

Carrier ID	Part	Wafer Capacity	Start (min)
1	Product 1	25	0
2	Product 2	25	0
3	Product 1	25	10
4	Product 2	25	10

Table II: The simulation tool's order screen.

The route screen (shown in Table III) allows the user to define the wafer sequence starting from and returning to the loadlocks. The screen includes the route name, process step name, step order number, processing and postprocessing time, and the distribution of the processing time. Multiple routes can be defined for the same scenario.

Route	Step	Tool Family	Process Time (sec)	Process Distribution
Route 1	1	Loadlock	0	Constant
Route 1	2	Orient/degas	79	Constant
Route 1	3	Etch	65	Constant
Route 1	4	Transfer module	0	Constant

Table III: The simulation tool's route screen.

Other inputs include station lift time, pump/vent time for loadlocks, equipment front-end module (EFEM) consideration, robot type, the number of facets (sides) a tool has (0, 4, 5, 6, 7, 8, or dual), and wafer-selection rules. A chamber-type window allows engineers to assign a chamber name, type of chamber (single, batch, etc.), a slit valve, capacity, priority, periodic lean cycles, transfer limitations, random downtime, and lift/lower clamp time.

From an output standpoint, the simulation tool can report throughput statistics such as wafers per hour and total time to process lots, carrier (lot) statistics, robot statistics, and chamber statistics, including maximum permissible number of wafers in the chambers, overall chamber utilization, total clean cycles, processing times, wait-for-robot times, and wait-for-next-station times. Moreover, the system can indicate chamber-to-chamber move times, the type of robot used, response times, and the move sequence from chamber to chamber.

Case Studies

In an effort to predict and improve tool utilization, the simulation system was tested in several case studies in the thin-film area. One study involved estimating the throughput of a deposition tool after it underwent a change in cleaning frequency. Another involved performing various process modifications to determine the throughput of the sputter toolset, which had been one of the bottlenecks in the fab. Other studies investigated the pasting wafer effect in the metal sputter toolset and the effects of using a single tool to process wafers with different deposition thicknesses.

Case Study 1: Improving a Tool's Cleaning Cycle. Using the simulation tool, the industrial engineering team was able to model a three-chamber, single-process Applied Materials Centura 5200 deposition tool and determine the impact of changing a cleaning cycle. In the simple process sequence, the wafers first went from the loadlock to one of the processing chambers (illustrated in Figure 1). Following deposition, the wafers were transferred to a cool-down plate with the capacity to hold eight wafers. Finally, the wafers were transported back to the loadlock.

Figure 1: Diagram of the single-process, three-chamber Applied Materials Centura 5200 deposition tool used in Case Study 1.

Standard fab practice had been to clean the chambers after eight wafers had been processed. To increase throughput, the process engineers proposed that cleaning be performed only after 16 wafers have been processed. To determine the throughput impact of that change, the simulation tool was engaged, enabling the engineers to calculate the new wafers-per-hour rate before implementing the change in the fab. Their findings, shown in Table IV, allowed upper management to arrive at a rapid decision and implement the change. Recipe B in Table IV reflects the modified cleaning frequency of each chamber. After the change was carried out, wafer counts per hour increased, resulting in chemical savings of $4 million per year for the complete toolset and a tool throughput rise of 23%.

Recipe	Wafers per Hour
A	17.67
B	21.78

Table IV: Tool simulation results showing the impact of changing cleaning frequency on a deposition tool from once every 8 wafers (recipe A) to once every 16 wafers (recipe B).

Case Study 2: Analyzing the Throughput Impact of Using Different Types and Numbers of Sputter Chambers. Two Applied Materials Endura 5500 dual-cluster sputter tools were investigated to determine the effect on tool performance of using different types and numbers of chambers. Tool A is used in the fab to perform traditional titanium nitride chemical vapor deposition processes. Two of its four chambers are Ti chambers (one of which has been modified), while the other two are TiN chambers. In contrast, Tool B has a new deluxe TiN chamber. A schematic drawing of the generic tool is illustrated in Figure 2. Traditionally, the route for the log points in these tools has been Ti → TiN. Tool A uses one Ti chamber and the two TiN chambers. The intent of this case study was to determine whether the throughput of the new deluxe chamber in Tool B would match that of the Ti chamber.

Figure 2: Diagram of the Applied Materials Endura 5500 dual-cluster sputter tool used in Case Study 2.

The simulation tool's dual-cluster template generated six scenarios to compare the performance of the two different sputter tools:

1. Tool A running the route Ti → TiN using one Ti chamber and two TiN chambers.
2. Tool B running the route Ti → TiN using one Ti chamber and the new deluxe TiN chamber.
3. Tool A running the route Ti → TiN with one Ti chamber and one TiN chamber.
4. Tool A running the route Ti → TiN with two Ti chambers and two TiN chambers.
5. Tool B running the route TiN → Ti with two deluxe TiN chambers and one Ti chamber.
6. Tool B running the route TiN → Ti with two deluxe TiN chambers and two Ti chambers.

The results from these six scenarios are presented in Table V. To calculate wafers-per-hour throughput, it was assumed that the tools were being fed wafers continuously, that the tools were processing in serial mode, and that no cleaning cycles or preventive maintenance tasks were being performed.

Scenario	Maximum Wafers-per-Hour Throughput
1	41.5
2	30.9
3	22.3
4	41.5
5	41.3
6	42.2

Table V: Wafers-per-hour results from six process scenarios run on two different Applied Materials sputter tools with varying configurations. (Scenarios in red indicate Tool B.)

Scenarios 2, 5, and 6 were of primary interest, since they involved Tool B. From the outset of the experiment, the engineers understood that if a deposition time of 95.5 seconds was not achieved with the new deluxe chamber, processing in only one such chamber at the regular TiN deposition time (scenario 2) would decrease wafers-per-hour throughput from 41.5 to 30.9. Hence, one TiN chamber would be inadequate to achieve proper throughput. Adding a second TiN chamber to the tool (scenario 5),would result in a higher throughput of 41.3 wafers per hour. By adding a second Ti chamber (scenario 6), throughput would increase to 42.2 wafers per hour. However, the small increase in throughput achieved by using two Ti chambers would not justify the added cost of the process modification.

Although the use of one Ti chamber and two regular TiN chambers (scenario 1) resulted in a slightly higher throughput than the use of one Ti chamber and two deluxe TiN chambers (scenario 5), the deluxe chamber resulted in better yield than the regular TiN chamber. Consequently, it was decided to convert the tools to the deluxe chamber configuration outlined in scenario 5. After one tool on the fab floor was converted and wafer throughput was verified, the remaining tools were converted.

Case Study 3: Determining Chamber Utilization and the Pasting Wafer Effect. Using the simulation system's dualcluster module, the industrial engineering team was able to quantify wafers-per-hour throughput on an Applied Materials Endura 5500 sputter tool. As shown in Figure 3, the tool configuration includes a pasting chamber, which is used to perform a wafer full clean of the TiN chamber after it has processed 50 wafers. Because of the system's visual approach, the team was able to understand the pasting wafer effect. The test sequence is presented in Table VI.

Figure 3: Diagram of the Applied Materials Endura 5500 sputter tool with paste chamber used in Case Study 3.

Using the simulation tool, the engineers could determine that the AlCu chamber was constraining throughput because that chamber had a longer processing time. They also found that the pasting of the TiN chamber constrained the entire process, because when the pasting in the TiN chamber was being performed, the entire process sequence stopped. The tool simulation outputs showing chamber utilization percentages are presented are Table VII.

Route	Step	Tool Family	Process Time (sec)	Process Distribution
Route 1	1	Loadlock	300	Constant
Route 1	2	Orient/degas	51	Constant
Route 1	3	A holding plate	0	Constant
Route 1	4	STII	49	Constant
Route 1	5	AlCu	67	Constant
Route 1	6	ST!2	59	Constant
Route 1	7	TiN	54	Constant
Route 1	8	BCool	51	Constant

Table VI: Test sequence used to determine wafers-per-hour throughput and the pasting wafer effect on a sputter tool.

 

Chamber Name	Estimated Overall Utilization (%)	Total Clean (PM) Cycles	Average Time in Tool Family (sec)	Maximum Time in Tool Family (sec)	Minimum Time in Tool Family (sec)
Orient	22.6	0	201.3	923.8	52.6
Holding plate	0	0	95.9	843.9	3
STI1	21.9	0	83.8	837.5	52
AlCu	75.3	0	91.6	837.9	70
STI2	48.5	0	86.4	837.9	58
Paste chamber	0	0	0	0	0
TiN	57.5	9	67.8	77.9	57
Cool	45.5	0	57	62.1	53

Table VII: Tool simulation outputs showing tool chamber utilization percentages on a sputter tool.

Case Study 4: Assessing the Effect of Cross-Releasing a Tool. Using the simulation tool cluster module, the industrial engineering team was able to estimate the effect of running a process in serial mode in a three-chamber, single-process Speed deposition tool from Novellus Systems running wafer lots with two possible deposition thicknesses: thickness A only (serial), thickness B only (serial), or thickness A in loadlock A and thickness B in loadlock B. For this experiment, the tool (illustrated in Figure 4) was configured for a single-deposition process. The sequence is presented in Table VIII.

Figure 4: Diagram of the single-process, three-chamber Novellus Speed deposition tool used in Case Study 4.

 

Route	Step	Tool	Process Time (sec)	Process Distribution
Route 1	1	Loadlock	60	Constant
Route 1	2	HDP	82 (thickness A) 109 (thickness B)	Constant
Route 1	3	Cool	63	Constant
Route 1	4	Loadlock	60	Constant

Table VIII: Experimental sequence to determine the effect of running a process in serial mode on a deposition tool.

Table IX shows the utilization rates for each chamber at a deposition time for thickness A of 82 seconds and thickness B of 109 seconds. Table X presents the tool's overall throughput results.

Step	Utilization Rate (%) for Thickness A	Utilization Rate (%) for Thickness B	Utilization Rate (%) for Thicknesses A and B
Cool	37.8	30.1	33.3
Chamber 1	86.2	88.3	87.9
Chamber 2	83.7	88.3	85.7
Chamber 3	83.7	88.3	85.0

Table IX: Estimated overall utilization rate of a deposition tool for thicknesses running serial.

 

Process	Wafers per Hour
Thickness A	113.8
Thickness B	89.8
Thicknesses A and B	99.7

Table X: Wafers-per-hour throughput results of a deposition tool for thicknesses running serial. Results were determined by the simulation system.

Since this process runs only one layer of thickness B and five layers of thickness A, dedicating an entire tool for thickness B was not considered optimal from the standpoint of mainframe utilization. Moreover, since inventory does not necessarily come into the process area to be processed with a particular thickness, the tools qualified for thickness A are sometimes fully loaded when the thickness B tools are in standby. Consequently, the cross-release of the thickness B tool to run thickness A was mandated. Using the simulation system, the engineers were able to assess the wafers-per-hour utilization rate that resulted from running both thicknesses in the same tool before actually implementing the change. It was finally decided to cross-release the tools to run both thicknesses in serial mode.

Conclusion

A series of case studies involving the use of a simulation tool demonstrated that the effects of process changes can be predicted before they are actually implemented on the fab floor. The tests resulted in improved tool utilization and cost savings. In most of these case studies, analyses resulted in increased utilization ranging from 5 to 10% on the bottleneck tools.

Before the simulation tool was developed, limited spreadsheet models were used to address equipment productivity. However, such spreadsheet systems have several pitfalls: they do not allow engineers to comprehend clean cycles, the effects of EFEM robots, the advantages and disadvantages of single and dual robots, chamber slit valves, pump/vent times, animation, and the impact of individual chamber level/mainframe. In addition, such models do not enable engineers to quantify the loss of tool availability resulting from the shutdown of an individual chamber. The simulation tool can address all of these issues effectively. Moreover, through these case studies, the engineers demonstrated the use of this tool in a high-volume/ high-mix wafer fab. The output from these case studies has subsequently been used routinely by fab management to make educated decisions on process changes and capital equipment investment.

The next steps in using the simulation tool at DMOS 5 include, but are not limited to, the analysis of a litho cell and the effect of having different loading ports on the litho cell, the effects of working with different exposure/coating/develop variables and how they impact throughput, and the applicability of simulation methodologies to chemical-mechanical polishing tools.

Acknowledgments

The authors would like to thank Todd LeBaron from Brooks-PRI Automation and Mark Whitaker, Bert Aguilera, Jim Laney, Lisa Fritz, Ken Henderson, Blake Pasker, Jitendra Mohite, Jennifer Manzay, Joseph Gallegos, Brian Vialpando, Salvatore Pavone, Lan Tran, and Robert Alexander from Texas Instruments for their contributions to the work reflected in this article.

Kishore Potti is the industrial engineering manager at Texas Instruments' DMOS 5 wafer fab (Dallas). He has 14 years of experience in the areas of simulation modeling, work-in-progress management, industrial engineering, and total productive manufacturing. Before joining the company, he worked in I300I as an assignee. Potti is the author of numerous papers in these areas and is American Production and Inventory Control Society–certified in just-in-time manufacturing, master planning, material requirements planning, and production and inventory control. He received an MS in industrial and management engineering from Montana State University in Bozeman. (Potti can be reached at 972/927-6988 or k-potti@ti.com.)

Manuel Aybar is an industrial engineer in Texas Instruments' DMOS 5 wafer fab. He has been extensively involved at the fab in developing ToolSim scenarios for numerous processes. Before joining the company in 2000, he was a planning engineer for Levi Strauss in the Dominican Republic. He received a BS in industrial engineering from Pontificia Universidad Catolica Madre y Maestra in Santiago, Dominican Republic, and a masters degree in industrial engineering management from the Rochester Institute of Technology in Rochester, New York. (Aybar can be reached at 972/927-7570 or m-aybar1@ti.com.)