EDITOR'S PAGE

Disruptive technologies

When SPIE Microlithography convenes each year, you can bet on two things: news stories from the lithography sector will increase dramatically around the show, and the meeting itself will provide great fodder for propeller-headed prognostication (PHP). This year's event, held at the Santa Clara Convention Center during the February-March hump week, paid off on both accounts. Many of the announcements concerned the latest technological and business developments from the next-generation lithography (NGL) front, with discussion of extreme ultraviolet (EUV), electron-projection (EPL), and 157-nm tech bouncing around the meeting rooms and exhibits like a laser in a hall of mirrors. Since NGL is itself still largely in the realm of PHPs—OK, not completely; there are prototype tools, masks, resists, and the like out there—the real futuristic stuff jumped beyond the CMOS realm. The specter of hard economic truths also tempered all but the most ivory tower–ensconced technical debates.

The main plenary keynote tried to peer a bit into the technological crystal ball to see when CMOS scaling might hit the proverbial wall and what might lurk on the other side. Karen Brown, former IBMer and Sematech litho director and now acting director of NIST, talked about the concept of "disruptive technologies." Using the solid-state transistor and the integrated circuit as inventions that defied predictions of their future implications, she discussed developments in such new-tech areas as molecular electronics (also known as molectronics or moletronics) and quantum computing.

First, though, Brown noted some troubling confluences of economics and technical challenges in the near term. The number of litho products is increasing dramatically, the wafers per mask exposure are decreasing, the tool costs per wafer exposed and the mask cost per level are increasing, all of which could result in litho costs per wafer at 100 nm exceeding the total affordable process cost per wafer. "If we fix the physics but we don't fix the cost equation, we don't have a solution," she warned. She referred to "Moore's Second Law," which cites the exponential rise in the cost of a new fab. Brown showed a chart that projected a cost per fab of $50 billion by 2010, or about 10% of the industry's total annual market value, an impossibly expensive proposition by anyone's economic yardstick. "We can make structures down to 1–10 nm," she mused, "but at what cost?"

On the subject of very, very small structures, Brown wondered, "what happens when Moore's [First] Law hits the wall.... How do we use other types of switches to compute?" She said moletronics uses molecules to perform electronic component functions, the same solution approach as CMOS, but with different materials. She listed some of the same "grand challenges" for moletronics as in the early days of silicon, such as developing metrology and correlating structure and function. Defect reduction could be an essential part of moletronic chipmaking as well, said Brown, noting that controlling defects in self-assembled monolayers, or SAMs, is critical.

As for quantum computing, when she claimed that 300 Qb (that's qubit, or quantum bit) is more memory than the number of particles in the universe, this reporter began to ponder two things: my insignificance in the grand scheme of things, and who figured out how many particles the universe contains. When Brown touched on experiments conducted on the "quantum entanglement" of four beryllium ions described in the March 2000 issue of Nature, I came to believe that the term actually meant the state of confusion achieved by lay people and other nonphysicists when confronted with the science behind quantum computing. Despite my sense of unease, I was thrilled to find out that research programs at NIST and companies such as IBM and HP, as well as at universities and national labs around the world, have made significant breakthroughs in this thoroughly mind-boggling field.

One unique aspect of the chipmaking industry, she said, is that "we depend on ourselves for our next technology—we fuel our own progress.... There's a lot of opportunities for us out there, but we're just going to have to get beyond the wall." While the day of reckoning for CMOS-type manufacturing draws ever closer, the vast potential of technologies yet to be invented brightens the predawn sky.

Tom Cheyney
Editor

tom.cheyney@cancom.com

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