The 300-mm Imperative

Assessing the feasibility of a 300-mm test and monitor wafer handling and logistics system

Juergen Griessing, Infineon Technologies; and Pascal Decamps, STMicroelectronics

Experimental results from an SEA project suggest that single-wafer FOUP technology is a viable option for 300-mm fab and equipment automation schemes.

The advent of 300-mm wafer processing brings new challenges and opportunities in product handling and automation. One concern facing equipment manufacturers and chipmakers is how to handle costly test and monitor wafers within the highly automated 300-mm facilities. A recent research project sought to assess the feasibility of a single-wafer box system's compatibility with front-opening unified pod (FOUP) equipment for the handling and transportation of 300-mm test wafers. The European Semiconductor Equipment Assessment (SEA) Project TTL2 (Tools for Test Lots Logistics) brought together such potential users as Infineon Technologies, STMicroelectronics, and International Sematech to investigate, along with the system's manufacturer, Incam Solutions (Grenoble, France), a complete tool set for single-wafer boxes in the manufacturing environment of the Semiconductor300 (I300I) pilot-line fab in Dresden, Germany. This article describes the system under review and reports on the results of the investigations.

Tool System Description

The Incam system is based on single-wafer FOUPs. These boxes are made from high-mechanical-strength carbon fiber­reinforced polycarbonate and feature firm positioning, heat resistance, lightweight design, and ESD protection. They also isolate wafers from airborne contaminants. The system's substrate holders were designed to avoid the wafer sag usually found in ordinary 13- or 25-wafer pods. The wafer is firmly secured with a three-dimensional clamping system. An example of a FOUP for One (FFO) box is pictured in Figure 1.

Figure 1: FOUP for One (FFO) single-wafer isolation box.

The boxes are compatible with either a standard 13- or 25-wafer-capacity loadport and with the front-opening interface mechanical standard (FIMS; SEMI E62) with the use of a single-wafer interface (SWIF) adapter, as shown in Figure 2. The SWIF adapter is positioned on the loadport by kinematic couplings (SEMI E57) and holds the FFO in such a position that it can be opened and the wafer removed, processed, and returned to the FFO while maintaining minienvironment conditions. The wafer elevation has been set to fit wafer slot 13 of an ordinary 25-wafer-batch FOUP, once the two latchkey slots of the door are mated to the opener keys.

Figure 2: Single-wafer interface (SWIF) adapter prior to loading (left) and loaded with an FFO (right).

The SWIF adapter makes the process tool loadport compatible with the FFO. When the FFO is loaded in the SWIF adapter, the system behaves like a normal 13- or 25-wafer-capacity FOUP, except that only one wafer is accessible. As shown in Figure 3, once the FFO is loaded into the SWIF, the door is opened by the two opener latchkeys and moved down into the minienvironment of the tool loading zone. When the door is open, a mapping mechanism in the process tool (if available) can start locating the wafer. SEMI's international physical interface and carrier task force has agreed on a document that specifies the minimum requirements to open and close the FFO using standard FOUP openers and to access the wafer in slot 13 in a 25-wafer FOUP configuration and in slot 7 in a 13-wafer FOUP configuration (SEMI E103).

Figure 3: Loading sequence for SWIF and FFO, with eventual transfer of wafer.

Five or seven FFOs can be clamped together with an automated material-handling system (AMHS) on the top and another on the bottom of the stack, as pictured in Figure 4. The resulting stack has the height of a 25-wafer FOUP and all the features for automated handling and kinematic coupling. A stack can be handled like a FOUP and stored in a FOUP stocker. In order to sort or merge a box in a stack, an automated box sorter is used. It can be operated in stand-alone mode by a graphical user interface or fully automated as an input/output station of a stocker. Although they provide a higher capacity, seven-box AMHS adapters are not recommended for wafer storage in stockers. They may interfere with the bin dimensions of 25-wafer FOUP systems and may exceed the weight specifications of an overhead transportation system. A five-box-capacity AMHS adapter is recommended to meet the dimensional and weight requirements of FOUP transport and storage systems.

Figure 4: Top and bottom automated material-handling system (AMHS) adapters with seven-FFO capacity.

Many semiconductor manufacturers use electronic devices such as tags attached to pods or cassettes that identify both the carrier and the wafers inside. Each FFO has an RF identification tag so that it can communicate with the factory's manufacturing execution system (MES) when sitting on a tool loadport on top of a SWIF. This information can also be used for visual operator communication via an LCD. FFOs stacked together in stockers and box sorters can employ this capability for uninterrupted traceability.

Yield-Related Monitor Wafers

Although the system described above may also be suited for minilot and single-wafer-lot production, the investigations reported here focused on test wafer management in a 25-wafer-batch production environment. To keep semiconductor production under control, the process flow, process steps, and process tools must all be monitored. A number of different test wafer types can be defined, each of them requiring different routing:

• Particle density test wafers are most commonly used to monitor the process tool condition after regular checks and maintenance, such as chemical and bath exchanges, and sputtering target exchange.
• Tool-monitoring test wafers are used for quality checks and trend monitoring of process steps.
• Metrology reference wafers are required by metrology tools for periodic calibration and by process tools if in situ measurements are applied.
• Production control wafers, such as send-ahead or pathfinder wafers, directly control the process flow; these are normally wafers from the regular production lot that occupy pods of their own on a temporary basis.
• Process engineering test wafers are processed for modifications and improvements of the entire process flow. Process engineering wafers are usually grouped in batches that feature a broad dispersion of 1 to 25 wafers, depending on the scope and purpose. Large batches of process engineering wafers were not covered by the TTL2 project. However, single-wafer process engineering lots for process excursion monitoring and for quick control and fast corrective actions could be managed by TTL2 tools.
• Chemical analysis wafers are used to analyze production problems and to routinely monitor material quality.

The nature and characteristics of these test wafer types are very different: some are bare wafers (particle density, tool-monitoring wafers), some need little preprocessing (particle density, tool-monitoring, metrology reference, chemical analysis wafers), some are productive wafers (production control wafers), and some undergo a high number of, if not all, process steps (process engineering test wafers). Moreover, cycle time can vary from one day to a full product cycle. In a conventional 25-wafer FOUP environment they may occupy only one or two slots (all but the process engineering test wafers) or up to 10 or more slots (process engineering test wafers). Some test wafers are used routinely either in the process flow or as a general production check and are part of the production plan. Others are used on an ad hoc basis and have to be managed besides the plan. There is no one-to-one allocation with test wafer types.

All IC makers have made substantial efforts to reduce the number of nonproductive wafers. Although these programs might be rather successful for lowering the use of particle density, tool-monitoring, and production control wafers, certain test wafers will never be eliminated. This is particularly true for process engineering wafers that are needed for permanent process improvements in the areas of cost, cycle time, and quality. Process engineering wafers quite often aim at improving only one single property of one single process step (etching selectivity, contact hole coverage, etc.). They need a few preprocessing steps that are defined on a case-by-case basis by process engineers, and hence, are not predictable. Because of this nonpredictability, fully automated test wafer management is difficult since 100% planning is not possible or economical. Manual test wafer management in these cases is much easier and can be facilitated with single-wafer boxes.

While considering the large fluctuations in the different types and uses of test wafers from one fab to another, reasonable numbers for a commodity fab with 5000 wafer starts per week (WSPW) have been determined (although for ASIC fabs and others with a diversified product mix, the number would be considerably higher):

• For test wafer inventory—6% of production wafer inventory.
• For carrier inventory—30% of wafer carriers (25-wafer FOUP) are for test wafers.

System Assessment: Wafer Care and Tool Compatibility

The assessment of the Incam system, which consisted of FFOs, SWIF adapters, AMHS adapters, and box sorters, was organized in two parts: wafer care and tool compatibility check. The wafer care segment comprised wafer and box contamination, box washability, and mechanical reliability.

Wafer Contamination. The FFO prototype was subjected to marathon wafer-handling particle contamination tests at I300I. After 10,000 opening/closing cycles, the levels of added particles were as low as 0.0034 particles/cm² per cycle. Another test was done to measure wafer contamination during long-term storage in Class 1 and Class 1000 environments. The FFO environmental temperature and pressure fluctuations were monitored, with temperature set at 22.5 ± 0.5°C and pressure at 1023 ± 43 mbar. Three FFOs were stored in a Class 1 area and subsequently in a Class 1000 zone. After 14 days, particle levels were found to be insigificant, with counts of 0.007 and 0.0145 particles/cm², respectively. For Class 1000 investigations, the air return in the CMP area was chosen, a location which normally varies between Class 1000 and 10,000 conditions. It should also be noted that particle sizes of 0.16 to 0.2 µm were very close to the resolution limit of the particle scanner used, but very low counts for particles of >0.2 µm were observed. Area counts have not been considered since they typically represent defects that are generated by handling rather than by storage.

Box Contamination. Particulate and metallic contamination levels were measured in FFO boxes before and after on-site cleaning. For this, 10-ml samples of ultrapure water used for rinsing the FFO after cleaning were analyzed for particle counts as well as for metallics in the parts-per-billion range. The numbers in Figure 5 were taken from four boxes. They show that box contamination can be kept reasonably below the specified limits. As Figure 6 illustrates, all values for metallic contamination were well below the upper specification limit, except for iron. Since contamination levels in the boxes as received were 0.031­0.060 ppb and no iron could be found in the box, it was concluded that the cleaning process using ultrasonic treatment in hot deonized (DI) water caused these levels.

Figure 5: Box contamination test results, measuring particles per 10 ml sample of rinsewater.

Figure 6: Box contamination test results, measuring metallic ions in rinsewater.

Washability. The purpose of this test was to demonstrate that the box would fit into a standard FOUP cleaner. The cleaning equipment chosen was the Milestone III (DMS Dynamic Micro Systems, Radolfzell, Germany). This tool is a spray cleaner with centrifugal-force drying and infrared-light heating. The aggressive process used—high acceleration force and high temperature—is particularly well suited for mechanical stability testing. The test showed that there was no visible distortion or aging of two seven-box stacks after repeated washing cycles. Two particle counting methods revealed that the rate of particle removal for the box was as good as that for FOUPs. While the number of particles transferred in DI water was 80% (see Figure 7), the direct particle count on the boxes' surfaces indicated that particle removal was 95% (see Figure 8). These results show that FFOs can be washed in a standard FOUP cleaner, as long as the process is compatible with FFO materials and design.

Figure 7: Water particle-transfer test results, after box cleaning.

Figure 8: Direct surface-particle count results, after box cleaning.

Mechanical Reliability: Door-Locking Mechanism. To check the reliability of the door-locking mechanism, more than 10,000 locking/unlocking cycles were carried out, during which torque, closing force, and wear (especially on seals) were monitored. The SEMI nominal values are a closing force of <9 N and torque of <1.7 N-m. As Figure 9 reveals, the torque and closing force remained stable during those 10,000 cycles. Torque was well below the given limit while the closing force slightly exceeded the limit. No wear could be detected on the seals, but the bolts showed some insignificant outwear.

Figure 9: Torque and closing-force results from FFO test bench.

Mechanical Reliability: Wafer Position. The wafer position in a cassette or FOUP is a critical aspect of automated wafer loading and has caused major problems in both 200- and 300-mm manufacturing. Wafers are often not positioned in well-defined tolerance windows as specified by SEMI E1.9, so tool handlers cannot match wafers placed out of tolerance. To deal with this, the highest and lowest points of wafers sitting in 14 different FFOs was determined in order to ascertain the smallest window that enclosed all of the wafers. These measurements were carried out on an SPP 300 single pick-and-place sorter (Recif, Aussonne, France). Figure 10 illustrates the results, with the two curves delineating the highest and lowest points for all of the wafers. The origin 164.0 marks the nominal value for the seated surface plane of a wafer in slot 13 of a 25-wafer FOUP above the horizontal datum plane (per SEMI E1.9 and E47.1). The shaded area indicates the top and bottom of the window that cannot be cut by a 725-µm-thick wafer. The three-sigma limits of the top wafer plane and the seated wafer plane are also shown. All measured values except one were within the specified limits. The lower three-sigma limit of the seated surface is about 0.1 mm below the bottom of the window, something which needs to be corrected by the SWIF.

Figure 10: Wafer position window test results.

Tool Compatibility Check. The tool compatibility of the SWIF and FFO were the main emphases of the next part of the investigation. Adaptations of the whole tool automation system, loadport, handler/gripper, mapper, and process chamber (including sensors and control software) had to be considered. Making process tools compatible with FFO technology requires careful consideration of the following functions:

• Loadports may have door-presence detection (i.e., vacuum coupling for FOUP doors, electrical or optical sensors) that are not applicable for the slim FFO doors. This feature needs to be deactivated, therefore, unless the detectors are located near the SWIF door zone (see SEMI E103).
• Some loadports have the capability to use pad B for automated detection of the SWIF adapter (see SEMI E1.9).
• Handlers need to be designed for single-wafer handling and end-effector design must observe exclusion zones (again, see SEMI E1.9), since these are used in FFOs for wafer support and clamping.
• For box-washing systems, the chamber must be designed to allow for the FFO's shallow cavity; this might require a new spray nozzle design.
• The tool control has to be adapted to accept the unique feature of only one wafer that is at position 13. This affects not only the deactivation of the FOUP door-presence sensors but the complete mapping procedure. Mapping procedures are not standardized, and each tool vendor has its own philosophy on verifying home position and cycling all 25 carrier slots.

These changes may require massive software changes or just a new configuration. Ideally the adaptation can be done simply by running a new recipe or, even more simply, by automation. All of the tools selected for the project except two could be adapted to make the necessary changes and were modified for FFO/SWIF acceptance during the project (see Table I for results).

The clear message to toolmakers is to be aware that semiconductor manufacturers may want equipment that automatically recognizes when an FFO is loaded. For this purpose, SEMI draft document 3182 (a revision of SEMI E103) for automatic identification using carrier-type sensing pad B was recently passed by the equipment automation committee during SEMI standards meetings held at Semicon Europa 2000. The revision of the ordinary FOUP standards, SEMI E47.1 and E1.9, to include the alternative use of information pad B in SEMI E103 has been proposed in SEMI draft document 3119.

Short Test Loops and Blind Process Checks

In another set of tests, wafers from a mother lot were processed in a short loop from a wafer sorter (wafers from a 25-wafer FOUP into one FFO) to preinspection (defect density), etch (wet or dry), postinspection (defect density and critical dimension measurement), and back to the mother lot by the wafer sorter. Short loops like this are typical for particle density and tool-monitoring test wafers.

After sorting from the mother lot, 14 FFOs were stacked together and transported to a box sorter close to the preinspection tool. This tool was used as a sort of semiautomated stocker. In a highly automated manufacturing environment, FFO stacks could go from the wafer sorter to a regular FOUP stocker and be brought to the box sorter on demand. This procedure has not been tested with AMHS since the system has not yet been released for manufacturing.

Wafer contamination during process handling was checked after running the process short loops for a tool compatibility check. These blind checks were carried out at a spin etcher and a dry etcher. This was a periodic check for all process tools: wafers were sent into the process chamber but no real process was carried out. Process conditions such as temperature, pressure, gas flow, spinning speed, and the like were simulated. Measurements showed no significant increase in particle densities; all values were well within the limits of results seen for 25-wafer FOUP technology. A typical example is depicted in Figure 11.

Figure 11: Results of a blind process check wafer contamination test.

The reference numbers taken from 25 checks using regular FOUPs and recipes made over a two-month period revealed a mean value of 38 counts and a standard deviation of ±48 counts. The variation of values was extremely high, so no statistical distribution can be assumed. For this check, all counts for particle sizes >0.15 µm—including area counts (handling errors)—were taken. All particle counts except one were below the mean value of the reference line, the standard deviation line was never touched, and the maximum value was far below the reference maximum value—all of which can be seen as excellent results.

Conclusion

The scope of SEA Project TTL2 covered most elementary automation components needed to manage FFOs in a full-automation environment, with the restriction that they had to be FOUP compatible. The feasibility of the physical and logical integration of the components to manage the single-wafer tests in an ordinary batch-type FOUP environment was successfully demonstrated. Beyond FOUP compatibility concerns, the single-wafer FOUP technology has proven to be applicable in a production-type environment. Reliability is comparable with most 25-wafer FOUPs on the market, and tool compatibility could be achieved with nearly all of the industrial tools selected. Single-wafer FOUP technology seems to be a viable choice for a variety of future fab applications, not just for those involving test wafers.

Acknowledgments

The work presented in this article has been done in the framework of SEA by the European Commission and generously supported by Georg Kelm. We would like to thank the following individuals for their valuable assistance in the project and specifically for adapting FFO technology to their tools: Kay Bothur, Applied Materials; Frank Verstraete, Applied Materials PDC; Harald Hanne, Brooks Automation; Heiko Riedelsberger, KLA-Tencor; Robert Chebi, Lam Research; Gert Drewes, Recif; Werner Riethmann, Semax; and Walter Voith, SEZ.

Standards Cited in Article

• "FIMS Front Opening Interface Mechanical Standard," SEMI Standard E62 (San Jose, SEMI).
• "Mechanical Specification for Boxes and Pods Used to Transport and Store 300-mm Wafers," SEMI Standard E47.1 (San Jose, SEMI).
• "Mechanical Specification for Cassettes Used to Transport and Store 300-mm Wafers," SEMI Standard E1.9 (San Jose, SEMI).
• "Mechanical Specification for Kinematic Couplings Used to Align and Support 300-mm Wafer Carriers," SEMI Standard E57 (San Jose, SEMI).
• "Mechanical Specification for a 300-mm Single-Wafer Box System That Emulates a FOUP," SEMI Standard E103 (San Jose, SEMI).  

Juergen Griessing is a member of Infineon Technologies's Fab of the Future project in Dresden, Germany, where he is responsible for external projects. From 1990 to 1994 he was project leader of the JESSI project on manufacturing science and technology, which combined the development efforts of six European IC manufacturers. He received a degree in electrical engineering from the Fachhochschule Esslingen and a degree in physics from the University of Munich, both in Germany. (Griessing can be reached at +49 351 8868501.)

Pascal Decamps is a production support engineer in the methods and handling group at STMicrolectronics (Crolles, France), where his main focus is wafer carrier flow management, including transportation, storage, usage, and maintenance. He earned mechanical engineering and automation engineering degrees from the Technology Institute of Grenoble University, France. (Decamps can be reached at +33 476 926471.)

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