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Once the mask was processed, an LWM-250 white-light CD metrology tool from Leica (Deerfield, IL), set at 150x, measured clear-space CDs of nondefective areas of the SEMI standard pattern. Since the target feature size was near 1.0 µm (at the mask plane), monochromatic light was not necessary. The widths of nondefective lines were measured to provide a baseline from which to set the threshold values for the stepper system and the AIMS. Seven locations were selected, with defect sizes ranging from 80 to 200 nm at the wafer plane. Another set of reference data were captured with a defect measurement system from AVI (Santa Clara, CA). This tool, which correlates well with a CD SEM, was used to make quick, accurate measurements of the isolated defects themselves.4 For image analysis, bitmaps were taken of each defect under investigation on a KMS-400 CD metrology tool from Zygo (Middlefield, CT). The imaging wavelength was g-line (436 nm) and the magnification was 100x, with a pixel size of 52.6 nm. These images were fed into the stepper system's software for printability analysis. Examples of the KMS-generated defect images are shown in Figures 3 and 4. Software Stepper Simulation This study marked the first time an enhanced prototype version of the existing stepper system software was used. Parameters were set to match the LWM CD values as closely as possible. Since there was no phase information available from the KMS measurements and the mask transmission retrieved by the g-line KMS systems was different from the mask transmission at actinic wavelength (248 nm), all necessary phase and transmission corrections were done at the stepper system simulation.
Simulated wafer images from these input bitmap mask images were initiated by the generation of an optical stepper model, which was done by the application of Numerical's ModelGen software. This software creates accurate, user-specific stepper models. The user then customizes the system for this particular applicationthe wafer exposure conditions from the tool in which the mask will ultimately be used. The actual wafer image calculation can be performed on any portion of the input bitmap mask image. Once completed, contour plots were generated and overlaid onto the aerial (or resist) image pattern. From these plots, a mask inspection engineer or operator has enough information regarding the defect performance at the wafer level to make reliable pass/repair/reject decisions. Hardware Aerial Image Simulation Before measurements could be taken, the lamp had to be precisely aligned with the optical column (consisting of NA, sigma, condenser, and field stop). Once aligned, the apertures were then focused on the mask plane. A clear reference image was then taken in an open quartz area (2 x 2 mm) to normalize the forthcoming measurements. The stepper simulation parameters chosen for this study were:
Using the defect inspection report from a KLA 353 (KLA-Tencor, San Jose), the stage received a reference point that allowed the MSM-100 to accurately move (within 3 µm) to each defect location. Once at the defect site, a preview option using UV light allowed the defect to be centered if it was large enough to resolve. A through-focus image was then taken using 11 2-µm focus increments. Image analysis helped to accurately focus the image at the defect location. The numerical aperture was adjusted using micrometers to precisely align the through-focus images. The stage was also adjusted in the z-axis to find the best focus setting. Once an aligned and adjusted through-focus image was captured, defect analysis could begin. An intensity profile plot shows changes in intensity across an x or y swath of a preset width. By setting a resist threshold (i.e., the amount of intensity to activate resist), a two-dimensional contour plot can be extracted showing the resist image on the wafer level. A linewidth versus defocus plot shows the change in linewidth at defect locations compared to defect-free locations. This study used both the contour plot and simulated linewidth plot to compare the results after employing the stepper system and AIMS. A resist threshold of 30% (AIMS) was used to determine printability on the wafer, which accurately correlates to the above-mentioned LWM measurements. Taking the percentage change in CD at each defect location removed possible image bias, allowing a greater degree of comparison between the stepper system and AIMS. Results and Discussion The CD measurements from the LWM-250 ultimately determined the threshold values used for the AIMS and the stepper system analyses, so a zero printed bias for this reticle was assumed. This is not normally the case for embedded-attenuated PSMs, but it was done here because printed wafer data were not available. As Figure 5 shows, a mean clear space CD of 0.288 µm at the wafer plane was targeted based on an average of the seven sites evaluated. The LWM had a mean of 0.288 µm with an 8-nm range, while AIMS simulated a mean of 0.287 µm (at a 30% threshold) with a 10-nm range, and the stepper system showed a mean of 0.290 µm (at a 37.6% threshold) with a 14-nm range.
Using the AIMS linewidth versus defocus plots as a guide, the best focus at clear-space locations correlated to approximately a 30% threshold. Examples of the 0.118-µm defect location are illustrated in Figures 6 and 7. At this threshold, the target CD of 0.288 µm was produced. For the stepper system, an exposure threshold of 37.6% was found to correlate to the targeted CD. Figures 8 and 9 are contour plots from both AIMS and the stepper system that show the effect of a 0.118-µm defect.
A linewidth of the space across the defect was also measured at each site. By taking the difference of this measurement and the nondefective space measurement from the same region, a change in linewidth was determined, also called CD error. The CD error was then compared to the defect sizes measured by the AVI tool. As Figure 10 reveals, the CD error does not correspond linearly with actual defect size. This well-known phenomenon is the result of a defectmain feature interaction caused by an optical proximity effect.5 The virtual stepper system found a larger CD error than the AIMS tool did for defect sizes >0.100 µm. That finding agrees with what had been seen previously, where the stepper system demonstrated that it can approach defect printability from a more conservative side than AIMS.6 The <0.100-µm defect produced a lower CD error using the stepper system than that found with AIMS. Interestingly, AIMS predicted the same CD error for a 0.095-µm defect, while the stepper system showed a higher sensitivity for sub-0.1-µm defects (see Figure 10). Moreover, the stepper system predicted readily seen resist lines bridging at a 0.20-µm defect size, and AIMS simulation showed fully separated lines with a delta CD of 69%.
The CD error of each tool was then taken as a percentage of the defect size. The difference in CD error could then be taken between simulation tools. Figure 11 illustrates those findings.
Conclusion In the case of attenuated PSMs, the stepper system predicts higher defect printability compared with the AIMS estimate, results that are consistent with a previous study that looked at binary defect printability.6,7 These findings also highlight the importance of correctly positioning the prediction of defect printability. A conservative estimate is thought to be most appropriate for a leading-edge production environment. Both AIMS and the stepper system are simulation tools and should be calibrated and verified against the only objective judgeprinted silicon. The fact that even without third-party calibration both tools demonstrated consistent defect printability results is quite encouraging. As shown in Table I, if one uses the common practice of setting a 10% CD tolerance threshold, the AIMS and the stepper system tools agree on which defects matter and which do not. It is also important to note that the algorithm used by the stepper system is an enhanced PSM prototype and will need additional investigation to better correlate the system's results with printed wafer data. A mask inspection engineer or operator should be able to separate defects that need repair from those that do not. While this has been evaluated on binary masks in the past, this study shows that on this data set, either AIMS or the stepper system could be used to accomplish the same task on MoSiON PSMs.
While the existing stepper system has shown good agreement when used on binary intensity masks, the prototype virtual stepper algorithm for use with attenuated PSMs will continue to be modified to correlate even more closely with wafer data. Images were collected for the stepper system tool using g-line illumination. The simulation accuracy can be greatly improved by collecting mask data at actinic wavelength. In the future, i-line, 248 nm, and even SEM images should be studied for their effects on improving these errors. Wafer prints of the phase-shift mask will provide the final say on what threshold values or calibrated resist model should be used, thereby validating or disproving the use of nondefective lines as a reference. Acknowledgments The authors wish to thank Suresh Biligiri of Photronics in Milpitas, CA, for collecting the KMS bitmap data, and Darren Taylor of Photronics in Allen, TX, for collecting the AVI defect size data. References
Eric R. Poortinga is working toward a BS in microelectronic engineering at the Rochester Institute of Technology (Rochester, NY). He is fulfilling his second cooperative education requirement as a development engineer in the Photronics Technology Group in Austin, TX. Poortinga has concentrated on AIMS research while working on other projects such as mask layout design, metrology tool utilization, and mask processing. (Poortinga can be reached at 512/248-6172 or epoortinga@austin.photronics.com.) Justin W. Novak joined the Photronics Technology Group in 1999 and is working as a development engineer at the company's Austin, TX, facility. He is responsible for equipment and process development of advanced photomask repair and printability programs. Before joining Photronics, he worked as a lithography/etch/diffusion process engineer, technical marketing engineer, and yield enhancement engineer for semiconductor and equipment manufacturers. He received his BS in microelectronic engineering from the Rochester Institute of Technology in 1999. (Novak can be reached at 512/248-6173 or jnovak@austin.photronics.com.) Benjamin G. Eynon is director of back-end-of-line technology development at the Photronics Technology Group in Austin. Before assuming that position in 1998, he worked as a process engineer, technical marketing engineer, and manufacturing manager for semiconductor and photomask manufacturers. He received a BS in microelectronic engineering from the Rochester Institute of Technology. (Eynon can be reached at 512/248-6169 or beynon@austin.photronics.com.) J. Tracy Weed, PhD, joined Numerical Technologies (San Jose) in 1999 as senior director of marketing and business development. He is responsible for the semiconductor equipment and mask technologies necessary to support advanced OPC and PSM techniques in addition to product management associated with the Virtual Stepper System and IC WorkBench. Weed worked for IBM Microelectronics from 1984 to 1999, where held a variety of engineering and management positions, largely focused in the area of advanced lithography development specializing in OPC and PSM techniques. He earned his BS and MS in structural inorganic chemistry from the University of Connecticut and his PhD from the University of California at Riverside in the area of synthetic organometallic chemistry. (Weed can be reached at 408/273-4320 or tweed@numeritech.com.) Linyong Pang, PhD, joined Numerical Technologies in 1999 as the engineering manager of the Virtual Stepper System. He is responsible for the development of this product and advanced mask defect printability analysis software. Before joining Numerical, he worked at Acuson's R&D lab and held senior engineering and management positions, during which time he invented and developed FreeStyle, an extended-field-of-view imaging product. He has eight patents pending in that area. He has a BS and an MS in mechanical engineering from the University of Science and Technology of China in Hefei, Anhui, and a PhD in mechanical engineering and an MS in computer science from Stanford University in Palo Alto, CA. (Pang can be reached at 408/273-4330 or lpang@numeritech.com.) Linard Karklin, PhD, joined Numerical Technologies in 1997 and now serves as the company's chief scientist. He pioneered the Virtual Stepper concept and has published numerous papers on mask defect printability. Previously, he was vice president of engineering and U.S. operations for Sigma-C, where he conducted the development of SOLID-C, a 3-D lithography simulator. Between 1993 and 1995, Karklin was an independent consultant on advanced photolithography development and simulation. From 1989 to 1993 he was a project manager working on the development of lithography and process simulation tools at Silvaco. Before that, he was a senior scientific staff member at the Latvian Academy of Sciences. Karklin received his BS and MS in electrical engineering and semiconductor physics from the Latvian State University, Riga, Latvia, and his PhD in physical chemistry from the Latvian Academy of Sciences, Riga. (Karklin can be reached at 408/273-4311 or lkarklin@numeritech.com.) MicroHome |
Search | Current Issue | MicroArchives Questions/comments about MICRO Magazine? E-mail us at cheynman@gmail.com. © 2007 Tom Cheyney |
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